SBVU078 November   2022

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Setup
    1. 2.1 LDO Input/Output Connector Descriptions
      1. 2.1.1 VIN and GND
      2. 2.1.2 BIAS and GND
      3. 2.1.3 VOUT and GND
      4. 2.1.4 EN
    2. 2.2 Optional Load Transient Input/Output Connector Descriptions
      1. 2.2.1 VDD and GND
      2. 2.2.2 J16
      3. 2.2.3 J18
      4. 2.2.4 J21
      5. 2.2.5 J22
      6. 2.2.6 J23
      7. 2.2.7 J24
    3. 2.3 TPS7A53A-Q1 LDO Operation and Component Selection
    4. 2.4 Optional Load Transient Circuit Operation
  5. 3Board Layout
  6. 4TPS7A53EVM-080 Schematic
  7. 5Bill of Materials

2.3 TPS7A53A-Q1 LDO Operation and Component Selection

The TPS7A53EVM-080 evaluation module contains the TPS7A53A-Q1 LDO with input, bias, soft-start, output capacitors, and PG pull-up resistor installed. These six components provide an implementation example, as s by the white text in Figure 2-2. The prepopulated capacitors are sized to make sure the minimum capacitance requirements are maintained under all normal operating conditions. Optional pads are available to test the LDO with additional setpoint options, as well as input, bias, and output capacitors beyond what is already installed on the EVM.

The TPS7A53A-Q1 LDO can be enabled or disabled by using the J8 3-pin header:

  • Place a 2-pin shunt across the header to tie VIN to EN to enable the device
  • Place a 2-pin shunt across the header to tie GND to EN to disable the device

Alternatively, by connecting an external function generator to TP4 (EN) and a nearby GND connection, the user can enable or disable the TPS7A53A-Q1 LDO after VIN is applied. Figure 2-1 shows the result of the TPS7A53EVM-080 during turn-on. The yellow trace is the input voltage, the green trace is the load current, and the red trace is the output voltage.

GUID-20220913-SS0I-QFQ6-LQ1K-LDX1VC1S8LMC-low.jpgFigure 2-1 TPS7A53EVM-080 Turn-On

If desired, a current probe can be inserted in the EVM as shown in Figure 2-2 to measure the input and output current. The slots were sized to fit most current probes, such as the LeCroy™ AP015 or CP031 current probes.

GUID-20220916-SS0I-QD1X-NFXF-6BSLN5JLZZLR-low.jpgFigure 2-2 TPS7A53EVM-080 With Current Probes Attached

The user has two options for providing a DC load on the output of the TPS7A53A-Q1. J10 can be used to place a DC load that flows through the current sense path on the output of the LDO. Alternatively, the J4 (VOUT) and J15 (GND) banana connectors can be used for external measurements and loading; however, the IOUT loop does not sense current flowing through these connectors. In cases where very fast transient tests are performed, ringing can occur on VIN or VOUT as a result of the PCB parasitic inductance. Placing a strip of wire on the exposed copper in the current path can reduce this ringing. 10 AWG wire can be used as needed. If ringing persists, install damping networks by adding a series resistor and capacitor in parallel with VIN. Locations where damping can be installed include C2 and R3, C7 and R2, and C17 and R19.

WARNING: Current probe sensors can be tied to GND and must not come into contact with energized conductors. See the user manual of your current probe for details. If your current probe has this limitation, use a thin strip of electrical or Kapton® tape to isolate the current sense path from the current probe.

Optional kelvin sense points are provided using the SMA connectors J2 (VIN) and J1 (VOUT).