SBOA387A March   2020  – April 2022 INA186-Q1

 

  1. 1Overview
  2. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 DCK-6 Package
    2. 2.2 DBV-5 Package
    3. 2.3 DDF-8 Package
  3. 3Failure Mode Distribution (FMD)
  4. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 DCK-6 Package
    2. 4.2 DBV-5 Package
    3. 4.3 DDF-8 Package
  5. 5Revision History

4.1 DCK-6 Package

Figure 4-2 shows the INA186-Q1 pin diagram for the DCK-6 package. For a detailed description of the device pins please refer to the 'Pin Configuration and Functions' section in the INA186-Q1 datasheet.

Figure 4-1 Pin Diagram (DCK-6 Package)
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
REF 1 Normal operation if REF pin is at GND potential by design; otherwise the system measurement will be incorrect. D if REF=GND by design; C otherwise
GND 2 Normal operation. D
VS 3 Power supply shorted to GND. B
IN+ 4 In high-side configuration, a short from the bus supply to GND will occur. B
IN- 5 In high-side configuration, a short from the bus supply to GND will occur (through RSHUNT). High current will flow from bus supply to GND. The shunt may be damaged. In low-side configuration, normal operation. B for high-side; D for low-side
OUT 6 Output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating, which could cause die junction temperature to exceed 150°C. B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
REF 1 Output common-mode voltage is not defined. Output will not maintain a linear relationship with differential input voltage. B
GND 2 When GND is floating, output will be incorrect as it is no longer referenced to GND. B
VS 3 No power to device. Device may be biased through inputs. Output will be incorrect and close to GND. B
IN+ 4 Shunt resistor is not connected to amplifier. IN+ pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. B
IN- 5 Shunt resistor is not connected to amplifier. IN- pin may float to an unknown value. Output will go to an unknown value not to exceed Vs or GND. B
OUT 6 Output can be left open. There is no effect on the IC, but the output will not be measured. C
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effect(s) Failure Effect Class
REF 1 2 - GND Normal operation if REF pin is at GND potential by design, otherwise the system measurement will be incorrect. D if REF=GND by design; C otherwise
GND 2 3 - VS Power supply shorted to GND. B
VS 3 4 - IN+ In high-side configuration, VS may be subjected to high voltage bus supply. In low side configuration, device power supply shorted to GND (through RSHUNT). A for high-side; B for low-side
IN+ 4 5 - IN- Inputs shorted together, so no sense voltage applied. Output will track REF voltage. B
IN- 5 6 - OUT In high-side configuration, OUT pin may be subjected to high voltage bus supply. In low side configuration, OUT is shorted to GND, device will not be damaged, but functionality will be affected. A for high-side; B for low-side
OUT 6 1 - REF Output will be pulled to REF voltage and output current may be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B
Table 4-5 Pin FMA for Device Pins Short-Circuited to supply
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
REF 1 Normal operation if REF pin is at VS potential by design; otherwise the system measurement will be incorrect. D if REF=VS by design; C otherwise
GND 2 Power supply shorted to GND. B
VS 3 Normal operation. D
IN+ 4 In high-side configuration, device power supply shorted to bus supply. In low-side configuration, device power supply shorted to GND (through RSHUNT). A for high-side; B for low-side
IN- 5 In high-side configuration, device power supply shorted to bus supply (through RSHUNT). In low-side configuration, device power supply shorted to GND. A for high-side; B for low-side
OUT 6 Output will be pulled to VS and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. B