5 Summary

The rapid rise in power density and the concomitant shrinkage of PCB copper volume have created a demanding thermal environment for in‑package Hall‑effect current sensors such as the TMCS114x series. While the traditional JEDEC‑based R_θja model provides a convenient first‑order estimate of junction temperature, it assumes that die quiescent power is the dominant heat source. The measurements in this paper demonstrate that, at the currents typical for these devices, power dissipated in the lead frame quickly overtakes quiescent dissipation and fundamentally changes the thermal response. Consequently, reliance on a single ambient‑temperature measurement can lead to significant errors when the layout or copper distribution deviates from the reference board used to generate the JEDEC parameters.

By directly monitoring the lead‑frame temperature with an isolated temperature‑sensor IC such as ISOTMP35R, a robust alternative method for estimating junction temperature can be achieved. The data shows a linear relationship between lead‑frame temperature rise and junction temperature with an effective thermal resistance of approximately 5 °C/W, a value that remains consistent across both room‑temperature (25 °C) and elevated‑temperature (125 °C) environments.

Overall, the study validates that a lead‑frame‑centric thermal model, supported by direct temperature measurement offers a more accurate and design‑friendly approach for assessing safe operating limits of TMCS114x Hall‑effect sensors in high‑density power applications. Future work could extend this methodology to other package types, alternate volumes and weights of copper polygons, and explore active thermal‑compensation techniques that leverage the measured lead‑frame temperature for dynamic current‑limit enforcement.