ZHCSR87
December 2022
DRV8316C
PRODUCTION DATA
1
特性
2
应用
3
说明
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
SPI Timing Requirements
7.7
SPI Slave Mode Timings
7.8
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Output Stage
8.3.2
Control Modes
8.3.2.1
6x PWM Mode (PWM_MODE = 00b or MODE Pin Tied to AGND)
8.3.2.2
3x PWM Mode (PWM_MODE = 10b or MODE Pin is Connected to AVDD with RMODE)
8.3.2.3
Current Limit Mode (PWM_MODE = 01b / 11b or MODE Pin is Hi-Z or Connected to AVDD)
8.3.3
Device Interface Modes
8.3.3.1
Serial Peripheral Interface (SPI)
8.3.3.2
Hardware Interface
8.3.4
Step-Down Mixed-Mode Buck Regulator
8.3.4.1
Buck in Inductor Mode
8.3.4.2
Buck in Resistor mode
8.3.4.3
Buck Regulator with External LDO
8.3.4.4
AVDD Power Sequencing on Buck Regulator
8.3.4.5
Mixed mode Buck Operation and Control
8.3.5
AVDD Linear Voltage Regulator
8.3.6
Charge Pump
8.3.7
Slew Rate Control
8.3.8
Cross Conduction (Dead Time)
8.3.9
Propagation Delay
8.3.9.1
Driver Delay Compensation
8.3.10
Pin Diagrams
8.3.10.1
Logic Level Input Pin (Internal Pulldown)
8.3.10.2
Logic Level Input Pin (Internal Pullup)
8.3.10.3
Open Drain Pin
8.3.10.4
Push Pull Pin
8.3.10.5
Four Level Input Pin
8.3.11
Current Sense Amplifiers
8.3.11.1
Current Sense Amplifier Operation
8.3.12
Active Demagnetization
8.3.12.1
Automatic Synchronous Rectification Mode (ASR Mode)
8.3.12.1.1
Automatic Synchronous Rectification in Commutation
8.3.12.1.2
Automatic Synchronous Rectification in PWM Mode
8.3.12.2
Automatic Asynchronous Rectification Mode (AAR Mode)
8.3.13
Cycle-by-Cycle Current Limit
8.3.13.1
Cycle by Cycle Current Limit with 100% Duty Cycle Input
8.3.14
Protections
8.3.14.1
VM Supply Undervoltage Lockout (NPOR)
8.3.14.2
AVDD Undervoltage Lockout (AVDD_UV)
8.3.14.3
BUCK Undervoltage Lockout (BUCK_UV)
8.3.14.4
VCP Charge Pump Undervoltage Lockout (CPUV)
8.3.14.5
Overvoltage Protection (OVP)
8.3.14.6
Overcurrent Protection (OCP)
8.3.14.6.1
OCP Latched Shutdown (OCP_MODE = 00b)
8.3.14.6.2
OCP Automatic Retry (OCP_MODE = 01b)
8.3.14.6.3
OCP Report Only (OCP_MODE = 10b)
8.3.14.6.4
OCP Disabled (OCP_MODE = 11b)
8.3.14.7
Buck Overcurrent Protection
8.3.14.8
Thermal Warning (OTW)
8.3.14.9
Thermal Shutdown (OTS)
8.3.14.9.1
OTS FET
8.3.14.9.2
OTS (Non FET)
8.4
Device Functional Modes
8.4.1
Functional Modes
8.4.1.1
Sleep Mode
8.4.1.2
Operating Mode
8.4.1.3
Fault Reset (CLR_FLT or nSLEEP Reset Pulse)
8.4.2
DRVOFF functionality
8.5
SPI Communication
8.5.1
Programming
8.5.1.1
SPI Format
8.6
Register Map
8.6.1
STATUS Registers
8.6.2
CONTROL Registers
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Three-Phase Brushless-DC Motor Control
9.2.1.1
Detailed Design Procedure
9.2.1.1.1
Motor Voltage
9.2.1.1.2
Using Active Demagnetization
9.2.1.1.3
Driver Propagation Delay and Dead Time
9.2.1.1.4
Using Delay Compensation
9.2.1.1.5
Using the Buck Regulator
9.2.1.1.6
Current Sensing and Output Filtering
9.2.1.2
Application Curves
9.2.2
Three-Phase Brushless-DC Motor Control With Current Limit
9.2.2.1
Block Diagram
9.2.2.2
Detailed Design Procedure
9.2.2.2.1
Motor Voltage
9.2.2.2.2
ILIM Implementation
9.2.2.3
Application Curves
9.2.3
Brushed-DC and Solenoid Load
9.2.3.1
Block Diagram
9.2.3.2
Design Requirements
9.2.3.2.1
Detailed Design Procedure
9.2.4
Three Solenoid Loads
9.2.4.1
Block Diagram
9.2.4.2
Design Requirements
9.2.4.2.1
Detailed Design Procedure
10
Power Supply Recommendations
10.1
Bulk Capacitance
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
11.3
Thermal Considerations
11.3.1
Power Dissipation
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
支持资源
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
术语表
13
Mechanical, Packaging, and Orderable Information
封装选项
机械数据 (封装 | 引脚)
RGF|40
MPQF173F
散热焊盘机械数据 (封装 | 引脚)
RGF|40
QFND672
订购信息
zhcsr87_oa
1
特性
的三相 BLDC 电机驱动器
逐周期电流限制,可限制相位电流
支持高达 200kHz 的 PWM 频率
主动消磁支持减少功率损耗
4.5V 至 35V 工作电压(绝对最大值 40V)
高输出电流能力:8A 峰值
低 MOSFET 导通状态电阻
T
A
= 25°C 时,R
DS(ON)
(HS + LS) 为 95 mΩ
低功耗睡眠模式
1.5 µA(V
VM
= 24V,T
A
= 25°C)
多种控制接口选项
6x PWM 控制接口
3x PWM 控制接口
具有逐周期电流限制的 6x PWM 控制接口
具有逐周期电流限制的 3x PWM 控制接口
不需要外部电流感测电阻器,内置电流感测功能
灵活的器件配置选项
DRV8316CR:用于器件配置和故障状态的 5 MHz 16 位 SPI 接口
DRV8316CT:基于硬件引脚的配置
支持 1.8V、3.3V 和 5V 逻辑输入
内置 3.3V (5%)、30mA LDO 稳压器
内置 3.3V/5V、200mA 降压稳压器
内置 3.3V、30mA LDO
延迟补偿减少占空比失真
整套集成保护特性
电源欠压锁定 (UVLO)
电荷泵欠压 (CPUV)
过流保护 (OCP)
热警告和热关断 (OTW/OTSD)
故障条件指示引脚 (nFAULT)
可选择通过 SPI 接口进行故障诊断