When turned on, a flyback converter starts with 0V output voltage. The low voltage can cause the feedback voltage FB to clamp to the maximum value and trigger overload protections. To prevent the clamping from happening, the UCG28836 starts in soft start mode. As Figure 7-9 shows, during this time, an internal FB voltage ramp increases in eight steps from 0V to the maximum value in 4ms. The maximum value of internal FB ramp is equivalent of 80% of the I_PK,MAX setting and changes for different resistor settings on the IPS pin. During soft start, the smaller of this internal ramp voltage and actual FB pin voltage is used to determine the device operating point in the control law of Figure 7-4. Once the internal FB ramp voltage reaches the maximum value at the end of 4ms is when control is transferred to FB pin voltage for output regulation. Soft start sequence is executed every time at start up or when recovering from fault (auto-retry or latch) and brown-out conditions. The minimum frequency clamp is changed to 10kHz only during soft start (which is otherwise at 25kHz during normal operation). The 10kHz minimum frequency clamp helps at start-up when valleys are missing and the control law forces turn-on of primary GaN HEMT every 100μs from the last turn-on edge (if valleys are missing), to charge the output capacitor.

Figure 7-9 Soft Start Sequence