ZHCSER5 December 2015 UCD3138064A
PRODUCTION DATA.
| FEATURE | UCD | ||||||
|---|---|---|---|---|---|---|---|
| 3138 3138A RHA/RMH |
3138064 3138064A RMH |
3138 3138A RGC |
3138064 3138064A RGC |
3138064 RGZ |
3138128 3138128A PFC |
3138A64 3138A64A PFC |
|
| Package Offering | 40 Pin QFN (6 mm x 6 mm) |
40 Pin QFN (6 mm x 6 mm) |
64 Pin QFN (9 mm x 9 mm) |
64 Pin QFN (9 mm x 9 mm) |
48 Pin QFN (7 mm x 7 mm) |
80 Pin QFP (14 mm x 14 mm) (Includes leads) |
80 Pin QFP (14 mm x 14 mm) (Includes leads) |
| ARM7TDMI-S Core Processor | 31.25 MHz | 31.25 MHz | 31.25 MHz | 31.25 MHz | 31.25 MHz | 31.25 MHz | 31.25 MHz |
| High Resolution DPWM Outputs (250ps Resolution) | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Number of High Speed Independent Feedback Loops (# Regulated Output Voltages | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| 12-bit, 256kps, General Purpose ADC Channels | 7 | 7 | 14 | 14 | 9 | 15 | 15 |
| Digital Comparators at ADC Outputs | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
| Flash Memory (Program) | 32 kB | 64 kB | 32 kB | 64 kB | 64 kB | 128 kB | 64 kB |
| Number of Memory 32kB Flash Memory Banks | 1 | 2 | 1 | 2 | 2 | 4 | Only 1 bank of 64 kB Flash available |
| Flash Memory (Data) | 2 kB | 2 kB | 2 kB | 2 kB | 2 kB | 2 kB | 2 kB |
| RAM | 4 kB | 4 kB | 4 kB | 4 kB | 4 kB | 8 kB | 8 kB |
| Programmable Fault Inputs | 1 + 2(1) | 1 + 2(1) | 4 | 2 + 2(1) | 1 + 2(1) | 4 | 4 |
| High Speed Analog Comparators with Cycle-by-Cycle Current Limiting | 6 | 6 | 7 | 7 | 6 | 7 | 7 |
| UART (SCI) | 1(1) | 1(1) | 2 | 2 | 2 | 2 | 2 |
| PMBus/I2C | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Additional I2C | 0 | 0 | 0 | 1(1) | 1(1) | 1 | 1 |
| SPI | 0 | 0 | 0 | 1(1) | 1(1) | 1 | 1 |
| Timers | 4 (16 bit) and 1 (24 bit) |
4 (16 bit) and 1 (24 bit) |
4 (16 bit) and 1 (24 bit) |
4 (16 bit) and 1 (24 bit) |
4 (16 bit) and 1 (24 bit) |
4 (16 bit) and 2 (24 bit) |
4 (16 bit) and 2 (24 bit) |
| Timer PWM Outputs | 1(1) | 1(1) | 2 | 2 | 1(1) | 4 | 4 |
| Timer Capture Inputs | 2(1) | 2(1) | 1 + 3(1) | 1 + 3(1) | 2(1) | 2 + 2(1) | 2 + 2(1) |
| Total Digital GPIOs | 18 | 18 | 30 | 30 | 24 | 43 | 43 |
| External Interrupts | 0 | 0 | 1 | 1 | 0 | 1 | 1 |
| External Crystal Clock Support | no | no | no | no | no | Yes (pins #61, 62) | Yes (pins #61, 62) |
| Peak Current Mode Control | EADC2 Only | All EADC channels | EADC Only | All EADC channels | All EADC channels | All EADC Channels | All EADC Channels |
| FEATURE | UCD3138064A 64 PIN | UCD3138064A 40 PIN |
|---|---|---|
| ARM7TDMI-S Core Processor | 31.25 MHz | 31.25 MHz |
| High Resolution DPWM Outputs (250ps Resolution) | 8 | 8 |
| Number of High Speed Independent Feedback Loops (# Regulated Output Voltages) | 3 | 3 |
| 12-bit, 267 ksps, General Purpose ADC Channels | 14 | 7 |
| Digital Comparators at ADC Outputs | 4 | 4 |
| Flash Memory (Program) | 64 kB | 64 KB |
| Flash Memory (Data) | 2 kB | 2 KB |
| Flash Security | √ | √ |
| RAM | 4 kB | 4 KB |
| DPWM Switching Frequency | up to 2 MHz | up to 2 MHz |
| Programmable Fault Inputs | 2 + 2(1) | 1 + 2(1) |
| High Speed Analog Comparators with Cycle-by-Cycle Current Limiting | 7(2) | 6 |
| UART (SCI) | 2 | 1(1) |
| PMBus | 1 | √ |
| I2C | 1(1) | 0 |
| SPI | 1(1) | 0 |
| Timers | 4 (16 bit) and 1 (24 bit) | 4 (16 bit) and 1 (24 bit) |
| Timer PWM Outputs | 2 | 1 |
| Timer Capture Inputs | 1 | 1(1) |
| Watchdog | √ | √ |
| On Chip Oscillator | √ | √ |
| Power-On Reset and Brown-Out Reset | √ | √ |
| Sync IN and Sync OUT Functions | √ | √ |
| Total GPIO (includes all pins with multiplexed functions such as, DPWM, Fault Inputs, SCI, etc.) | 30 | 18 |
| External Interrupts | 1 | 0 |
| Package Offering | 64 Pin QFN (9.00 mm x 9.00 mm) |
40 Pin QFN (6.00 mm x 6.00mm) |