SLVSJ11A August   2025  – October 2026 UCC57132 , UCC57138

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Stage
      2. 6.3.2 Enable/Fault (EN/FLT)
      3. 6.3.3 Driver Stage
      4. 6.3.4 Overcurrent (OC) Protection
      5. 6.3.5 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. 7  Applications and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Driving MOSFET/IGBT/SiC MOSFET
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
          1. 7.2.1.2.1 VDD Undervoltage Lockout
          2. 7.2.1.2.2 Power Dissipation
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Thermal Consideration
  9. 8 Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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6.3.4 Overcurrent (OC) Protection

The UCC5713x implements a fast overcurrent protection feature through the OCP pin to protect the MOSFET/IGBT from catastrophic breakdown during a fault. The OCP pin senses the voltage drop across the current sense resistor, and the pin can handle up to -10V negative DC voltage. The relationship between input, output and enable, found in OC Protection Timing Diagram, shows the typical operating conditions for OC protection. The device features an internal leading edge blanking time, tOCLEB, that is activated at each rising edge of the input. During the tOCLEB, the driver disables overcurrent fault detection. For noisy systems, an additional RC filter is recommended to avoid false fault reporting. After the device exits tOCLEB and the OCP pin voltage is above VOCTH, OUT goes low after tOC2OUT and EN/FLT is pulled low after tOC2FLT. Once the OCP pin voltage goes above VOCTL, EN/FLT is pulled up and OUT stays low until the next input rising edge.

UCC57132 UCC57138 OC Protection Timing DiagramFigure 6-4 OC Protection Timing Diagram