ZHCSDB6 February   2015 UCC24650

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 UVLO Block
      2. 7.3.2 PCD
      3. 7.3.3 Sample, Hold, and Transient Detector
      4. 7.3.4 Wake Pulse Generator and WAKE Switch
      5. 7.3.5 PCD Counter and ENS Switch
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档 
    2. 11.2 商标
    3. 11.3 静电放电警告
    4. 11.4 术语表
  12. 12机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The UCC24650 Wake-Up monitor is intended to be used with the UCC28730 PSR controller in off-line isolated DCM flyback converters. The UCC24650 signals the UCC28730 that the output voltage has drooped. This allows the PSR controller to react to a load increase even while operating at extremely-low switching frequencies. This pair of devices also operates at very-low bias currents to facilitate the achievement of <5 mW of input power consumption during the no-load operating condition.

8.2 Typical Application

A typical application for the UCC24650 uses the compatible UCC28730 PSR controller to regulate an isolated low-voltage DC output from a high-voltage AC source. As shown in Figure 19 and Figure 20, the output rectification can use a ground-referenced diode, or a ground-referenced synchronous rectifier, respectively.

NOTE

These figures are simplified to illustrate the basic application of the UCC24650 and do not show all of the components and networks needed for an actual converter design.

UCC24650 app5pin_lusbl6.gifFigure 19. Simplified Application With Ground-Referenced Diode
UCC24650 sr_lusbl6.gifFigure 20. Simplified Application With Ground-Referenced Synchronous Rectifier

8.2.1 Design Requirements

Among the usual converter design requirements, the UCC24650 is especially suited to aid in achieving fast load-transient response and extremely-low input standby power. In many cases, the designer can achieve <5 mW of standby power, often referred to as Zero-Power.

8.2.2 Detailed Design Procedure

There is little design work required to use this device. Most calculations involve verification that the external conditions remain within the device’s various parameter operating limits.

Major design items to cover are:

  • Ensure sufficient margin between lowest droop expected and the device UVLO threshold. The UVLO threshold is approximately 3.75 V and the compatible PSR controller usually requires some short time to respond to the WAKE signal and arrest the load-step droop. The minimum regulation voltage compatible with the use of this device must account for the anticipated droop plus any additional droop due to threshold reset and PSR response limitations.
  • Ensure the maximum switching period tSW(max) is not exceeded, or the droop threshold may drift lower or higher and become inaccurate.
  • Ensure the system-level VOUT overshoot remains below the device VDD absolute maximum rating.
  • Ensure the system-level VSEC spike overshoot remains below the device WAKE absolute maximum rating.
  • Ensure the system switched-node impedance allows sufficient signal amplitude so that the PSR controller is able to detect it. If necessary, a PNP emitter-follower buffer may be inserted between the WAKE pin and the secondary winding to boost the wake-up signal current level.
  • Determine WAKE series resistance to limit current out of terminal, if necessary.

8.2.3 Application Curves

The following figures indicate the transient response of a 5-V, 10-W flyback converter which receives a pulsed step-load of 2 A while operating in the no-load standby condition. Figure 24 indicates the no-load standby input power consumption achieved by this converter over the full AC input range. Zero-Power operation is achieved while retaining fast transient response to a full load step.

UCC24650 ai_scr_2A_Wake_2ms_lusbl6.gifFigure 21. 2-A Load Step During Standby Operation
UCC24650 ai_scr_2A_Wake_40us_lusbl6.gifFigure 23. Wake-Up Pulse Triggering Response from UCC28730 Primary-Side Controller
UCC24650 ai_scr_2A_Wake_400us_lusbl6.gif
Figure 22. Transient Response Detail for 2-A Load Step
UCC24650 D003_SLUUB75.gif
Figure 24. No-Load Input Power Consumption for a 5-V, 10-W Converter