SGLS318A November   2005  – November 2015 UC2854B-EP

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Multiply/Square and Divide
      2. 8.3.2 Voltage Amplifier
      3. 8.3.3 Current Amplifier
      4. 8.3.4 Miscellaneous
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1  Switching Frequency
        2. 9.2.2.2  Inductor Selection
        3. 9.2.2.3  Output Capacitor
        4. 9.2.2.4  Switch and Diode
        5. 9.2.2.5  Current Sensing
        6. 9.2.2.6  Peak Current Limit
        7. 9.2.2.7  Multiplier Set-up
        8. 9.2.2.8  Feedforward Voltage
        9. 9.2.2.9  Multiplier Input Current
        10. 9.2.2.10 Oscillator Frequency
        11. 9.2.2.11 Current Error Amplifier Compensation
        12. 9.2.2.12 Voltage Error Amplifier Compensation
        13. 9.2.2.13 Feedforward Voltage Divider Filter Capacitors
        14. 9.2.2.14 Design Procedure Summary
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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8 Detailed Description

8.1 Overview

The objective of active power factor correction is to make the input to a power supply look like a simple resistor. An active power factor corrector does this by programming the input current in response to the input voltage. As long as the ratio between the voltage and current is a constant the input will be resistive and the power factor will be 1.0. When the ratio deviates from a constant the input will contain phase displacement, harmonic distortion or both and either one will degrade the power factor. UC3854 configured as a boost converter can be used to meet the system needs.

A boost regulator is an excellent choice for the power stage of an active power factor corrector because the input current is continuous and this produces the lowest level of conducted noise and the best input current waveform. The disadvantage of the boost regulator is the high output voltage required. The output voltage must be greater than the highest expected peak input voltage.

The boost regulator input current must be forced or programmed to be proportional to the input voltage waveform for power factor correction. Feedback is necessary to control the input current and either peak current mode control or average current mode control may be used. Both techniques may be implemented with the UC3854.

8.2 Functional Block Diagram

UC2854B-EP fbd_sgls318.gif

8.3 Feature Description

The UC2854B is designed as a pin compatible upgrade to the industry standard UC2854 active power factor correction circuits. The circuit enhancements allow the user to eliminate in most cases several external components currently required to successfully apply the UC2854. In addition, linearity improvements to the multiply, square and divide circuitry optimizes overall system performance. Detailed descriptions of the circuit enhancements are provided below. For in-depth design applications reference data see the application notes, UC2854 Controlled Power Factor Correction Circuit Design (SLUA144) and UC2854A and UC2854B Advanced Power Factor Correction Control ICs (SLUA177).

8.3.1 Multiply/Square and Divide

The UC2854B multiplier design maintains the same gain constant UC2854B-EP eq_K_n1_gls318.gif as the UC2854. The relationship between the inputs and output current is given as:

Equation 1. UC2854B-EP eq_05_sgls318.gif

This is nearly the same as the UC2854, but circuit differences have improved the performance and application.

The first difference is with the IAC input. The UC2854B regulated this pin voltage to the nominal 500 mV over the full operating temperature range, rather than the 6 V used on the UC2854. The low offset voltage eliminates the need for a line zero crossing compensating resistor to VREF from IAC that UC2854 designs require. The maximum current at high line into Iac should be limited to 250 μA for best performance.

Therefore, if VVAC(max) = 270 V,

Equation 2. UC2854B-EP eq_R_IAC_gls318.gif

The VRMS pin linear operating range is improved with the UC2854B as well. The input range for VRMS extends from 0 V to 5.5 V. Since the UC2854A squaring circuit employs an analog multiplier, rather than a linear approximation, accuracy is improved, and discontinuities are eliminated. The external divider network connected to VRMS should produce 1.5 V at low line (85 VAC). This puts 4.77 V on VRMS at high line (27 VAC) which is well within its operating range.

The voltage amplifier output forms the third input to the multiplier and is internally clamped to 6 V. This eliminated an external zener clamp often used in UC2854 designs. The offset voltage at this input to the multiplier has been raised on the UC2854A/B to 1.5 V.

The multiplier output pin, which is also common to the current amplifier non-inverting input, has a −0.3 V to 5 V output range, compared to the −0.3 V to 2.5 V range of the UC2854. This improvement allows the UC2854B to be used in applications where the current sense signal amplitude is large.

8.3.2 Voltage Amplifier

The UC2854B voltage amplifier design is essentially similar to the UC2854 with two exceptions. The first is with the internal connection. The lower voltage reduces the amount of charge on the compensation capacitors, which provides improved recovery form large signal events, such as line dropouts, or power interruption. It also minimizes the dc current flowing through the feedback. The output of the voltage amplifier is also changes. In addition to a 6-V temperature compensated clamp, the output short circuit current has been lowered to 2 mA typical and an active pull down has replaced the passive pull down of the UC2854.

8.3.3 Current Amplifier

The current amplifier for an average current PFC controller needs a low offset voltage in order to minimize AC line current distortion. With this in mind, the UC2854B current amplifier has improved the input offset voltage from ±4 mV to 0 V to ±3 mV. The negative offset of the UC2854B assures that the PWM circuit will not drive the MOSFET is the current command is zero (both current amplifier inputs zero.) Previous designs required an external offset cancellation network to implement this key feature. The bandwidth of the current amplifier has been improved as well to 5 MHz typical. While this is not generally an issue at 50-Hz or 60-Hz inputs, it is essential for 400-Hz input avionics applications.

8.3.4 Miscellaneous

Several other important enhancements have been implemented in the UC2854B. A VCC supply voltage clamp at 20 V allows the controller to be current fed if desired. The lower startup supply current (250 mA typical), substantially reduces the power requirements of an offline startup resistor. The 10.5 V/10 V UVLO option (UC2854B) enables the controller to be powered off of an auxiliary 12-V supply.

The VREF GOOD comparator assures that the MOSFET driver output remains low if the supply of the 7.5 V reference are not yet up. This improvement eliminates the need for external Schottky diodes on the PKLMT and Mult Out pins that some UC2854 designs require. The propagation delay of the disable feature has been improved to 300 ns typical. This delay was proportional to the size of the VREF capacitor on the UC2854 and is typically several orders of magnitude slower.

8.4 Device Functional Modes

Functional Block Diagram shows a block diagram of the UC2854. This integrated circuit contains the circuits necessary to control a power factor corrector. The UC2854 is designed to implement average current mode control but is flexible enough to be used for a wide variety of power topologies and control methods.

The top left corner of Functional Block Diagram contains the undervoltage lockout comparator and the enable comparator. The output of both of these comparators must be true to allow the device to operate. The inverting input to the voltage error amplifier is connected to pin 11 and is called Vsense. The diodes shown around the voltage error amplifier are intended to represent the functioning of the internal circuits rather than to show the actual devices. The diodes shown in the block diagram are ideal diodes and indicate that the non-inverting input to the error amplifier is connected to the 7.5Vdc reference voltage under normal operation but is also used for the slow start function. This configuration lets the voltage control loop begin operation before the output voltage has reached its operating point and eliminates the turn-on overshoot which plagues many power supplies. The diode shown between pin 11 and the inverting input of the error amplifier is also an ideal diode and is shown to eliminate confusion about whether there might be an extra diode drop added to the reference or not. In the actual device, this is done with differential amplifiers. An internal current source is also provided for charging the slow start timing capacitor.