ZHCSD70B November   2014  – February 2015 TS3A227E

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用范围
  3. 3 说明
  4. 4 简化电路原理图
  5. 5 修订历史记录
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Interface Timing Characteristics
    7. 7.7 Timing Diagrams
      1. 7.7.1 Removal
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Accessory Configuration Detection
      2. 9.3.2 Optional Manual I2C Control
      3. 9.3.3 Adjustable De-bounce Timings
      4. 9.3.4 Key Press Detection
      5. 9.3.5 Click Pop Noise Reduction
      6. 9.3.6 Power off Noise Removal
      7. 9.3.7 Sleep Mode
      8. 9.3.8 Codec Sense Line
      9. 9.3.9 FM Support
    4. 9.4 Device Functional Modes
      1. 9.4.1 Sleep Mode
      2. 9.4.2 Manual Switch Control
      3. 9.4.3 Manual Switch Control Use Cases
      4. 9.4.4 FM Support Mode
    5. 9.5 Register Maps
    6. 9.6 Register Field Descriptions
      1. 9.6.1  Device ID Register Field Descriptions (Address 00h)
      2. 9.6.2  Interrupt Register Field Descriptions (Address 01h)
      3. 9.6.3  Key Press Interrupt Register Field Descriptions (Address 02h)
      4. 9.6.4  Interrupt Disable Register Field Descriptions (Address 03h)
      5. 9.6.5  Device Settings Field Descriptions (Address 04h)
      6. 9.6.6  Key Press Settings 1 Field Descriptions (Address 05h)
      7. 9.6.7  Key Press Settings 2 Field Descriptions (Address 06h)
      8. 9.6.8  Switch Control 1 Field Descriptions (Address 07h)
      9. 9.6.9  Switch Control 2 Field Descriptions (Address 08h)
      10. 9.6.10 Switch Status 1 Field Descriptions (Address 09h)
      11. 9.6.11 Switch Status 2 Field Descriptions (Address 0Ah)
      12. 9.6.12 Detection Results Field Descriptions (Address 0Bh)
      13. 9.6.13 ADC Output Field Descriptions (Address 0Ch)
      14. 9.6.14 Threshold 1 Field Descriptions (Address 0Dh)
      15. 9.6.15 Threshold 2 Field Descriptions (Address 0Eh)
      16. 9.6.16 Threshold 3 Field Descriptions (Address 0Fh)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Standard I2C Interface Details
        2. 10.2.1.2 Write Operations
        3. 10.2.1.3 Read Operations
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Accessory Insertion
        2. 10.2.2.2 Audio Jack Selection
        3. 10.2.2.3 Switch Status
          1. 10.2.2.3.1 Switch Status Diagrams
        4. 10.2.2.4 Key Press Detection
          1. 10.2.2.4.1 Key Press Thresholds
          2. 10.2.2.4.2 System Requirements
          3. 10.2.2.4.3 Key Press Grey Zones
          4. 10.2.2.4.4 Behavior
          5. 10.2.2.4.5 Single Key Press Timing
          6. 10.2.2.4.6 Multiple Key Press Timing
          7. 10.2.2.4.7 Raw Data Key Press Detection
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example (QFN)
    3. 12.3 Layout Example (DSBGA)
  13. 13器件和文档支持
    1. 13.1 商标
    2. 13.2 静电放电警告
    3. 13.3 术语表
  14. 14机械封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

12 Layout

12.1 Layout Guidelines

  • The VDD pin must have de-coupling capacitors places as closely to the device as possible. Typically recommended capacitors are a 0.1 µF and 1 µF capacitor.
  • If FM support is not needed connect GNDA to system GND along with the GND connections with the shortest connections possible.
  • RING2 and SLEEVE should be routed on the same layer as the audio jack for best performance with less than 50 mΩ to the audio jack pins. These two pins should have priority in layout over other pins. It is recommended to not use vias on these traces and pair the device with an audio jack that facilitates this type of layout.
  • The RING2_SENSE and SLEEVE_SENSE pins are kelvin connections to the audio jack and should be shorted to RING2 and SLEEVE as close to the audio jack as possible. If there are 0 Ω resistors between the SLEEVE/RING2 pins and the jack, connect the SENSE lines to the jack sleeve and ring2 contacts. If a microphone is connected one of the SENSE lines will carry the microphone signal and the MICBIAS supply. It is recommended that these traces not have more than 1 Ω impedance to the jack.
  • Route the I2C and digital signals away from the audio signals to prevent coupling onto the audio lines.

12.2 Layout Example (QFN)

TS3A227E lo_guidlne_qfn_ex_scds358.gifFigure 35. QFN Layout Example

12.3 Layout Example (DSBGA)

TS3A227E lo_guidlne_dsbga_ex_scds358.gifFigure 36. DSBGA Layout Example