ZHCSEC5D November   2015  – May 2021 TPS65235

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Boost Converter
      2. 7.3.2  Linear Regulator and Current Limit
      3. 7.3.3  Boost Converter Current Limit
      4. 7.3.4  Charge Pump
      5. 7.3.5  Slew Rate Control
      6. 7.3.6  Short Circuit Protection, Hiccup and Overtemperature Protection
      7. 7.3.7  Tone Generation
      8. 7.3.8  Tone Detection
      9. 7.3.9  Disable and Enable
      10. 7.3.10 Component Selection
        1. 7.3.10.1 Boost Inductor
        2. 7.3.10.2 Capacitor Selection
        3. 7.3.10.3 Surge Components
        4. 7.3.10.4 Consideration for Boost Filtering and LNB Noise
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 TPS65235 I2C Update Sequence
    6. 7.6 Register Maps
      1. 7.6.1 Control Register 1 (address = 0x00H) [reset = 00010000]
      2. 7.6.2 Control Register 2 (address = 0x01H) [reset = 0000101]
      3. 7.6.3 Status Register (address = 0x02H) [reset = x0100000]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application for DiSEqc1.x Support
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
      4. 8.2.4 Typical Application for DiSEqc2.x Support
        1. 8.2.4.1 Design Requirements
        2. 8.2.4.2 Detailed Design Procedure
        3. 8.2.4.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 接收文档更新通知
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

7.3.10.1 Boost Inductor

TPS65235 is recommended to operate with a boost inductor value of 4.7 µH or 10 µH. The boost inductor must be able to support the peak current requirement to maintain the maximum LNB output current without saturation. Below formula can be used to estimate the peak current of the boost inductor.

Equation 5. GUID-239B97BC-F488-4106-95AD-648B8607E7FE-low.gif
Equation 6. GUID-2D003725-04AE-4EED-9CCE-1BA2602BA948-low.gif

With the different inductance, the system will have different gain and phase margins, Figure 7-5 shows a Bode plot of boost loop with 2 x 10 µF / 35 V of boost capacitor and 4.7 µH, 5.6 µH, 6.8 µH, 8.2 µH and 10 µH of boost inductance. As the boost inductance increases, the 0 dB crossover frequency keeps relatively constant while the phase and gain margins reduced. With 4.7 µH, the phase margin is 66.96° and with 10 µH the phase margin is 39.63°.

GUID-2C405577-AFAB-4F52-8E09-BBD79B454859-low.gifFigure 7-5 Gain and Phase Margin of the Boost Loop with Different Inductance (VIN = 12 V, VOUT = 18.2 V, ILOAD = 1 A, FSW = 1 MHz, 5 µF, Typical Bode Plot)