SLVSA48A April   2010  – September 2015 TPS65200

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Data Transmission Timing
    7. 6.7 Typical Characteristics
      1. 6.7.1 Switching Charger
      2. 6.7.2 OTG Boost
      3. 6.7.3 LDO
      4. 6.7.4 WLED Boost
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Global State Diagram
      2. 7.3.2 LED Driver Operation
        1. 7.3.2.1 Undervoltage Lockout
        2. 7.3.2.2 Shutdown
        3. 7.3.2.3 Soft-Start Circuit
        4. 7.3.2.4 Open LED Protection
        5. 7.3.2.5 Current Program
        6. 7.3.2.6 Brightness Dimming
        7. 7.3.2.7 Inductor Overcurrent Protection
      3. 7.3.3 HV LDO
      4. 7.3.4 Interrupt Pin
      5. 7.3.5 Current Shunt Monitor
    4. 7.4 Device Functional Modes
      1. 7.4.1 Charge Mode Operation
        1. 7.4.1.1  Input Current Limiting and D+/D- Detection
        2. 7.4.1.2  Bad Adaptor Detection/Rejection (CHBADI)
        3. 7.4.1.3  Input Current Limiting at Start-Up
        4. 7.4.1.4  Charge Profile
        5. 7.4.1.5  Precharge to Fast Charge Threshold (VSHORT)
        6. 7.4.1.6  PWM Controller in Charge Mode
        7. 7.4.1.7  Battery Charging Process
        8. 7.4.1.8  Thermal Regulation and Protection
        9. 7.4.1.9  Safety Timer in Charge and Boost Mode (CH32MI, BST32SI)
        10. 7.4.1.10 Input Voltage Protection in Charge Mode
          1. 7.4.1.10.1 Input Overvoltage Protection (VBUSOVPI)
          2. 7.4.1.10.2 Reverse Current Protection (CHRVPI)
          3. 7.4.1.10.3 Input Voltage Based Dynamic Power Management (CHDPMI)
        11. 7.4.1.11 Battery Protection in Charge Mode
          1. 7.4.1.11.1 Battery Charge Current Limiting
          2. 7.4.1.11.2 Output Overvoltage Protection (CHBATOVPI)
          3. 7.4.1.11.3 Battery Short Protection
        12. 7.4.1.12 Charge Status Output, STAT Pin
      2. 7.4.2 Boost Mode Operation
        1. 7.4.2.1 PWM Controller in Boost Mode
        2. 7.4.2.2 Boost Start Up
        3. 7.4.2.3 PFM Mode at Light Load
        4. 7.4.2.4 Safety Timer in Boost Mode (BST32SI)
        5. 7.4.2.5 Protection in Boost Mode
          1. 7.4.2.5.1 Output Overvoltage Protection (BSTBUSOVI)
          2. 7.4.2.5.2 Output Over-Load Protection (BSTOLI)
          3. 7.4.2.5.3 Battery Voltage Protection (BSTLOWVI, BSTBATOVI)
      3. 7.4.3 High Impedance Mode
    5. 7.5 Programming
      1. 7.5.1 I2C Bus Operation
    6. 7.6 Register Maps
      1. 7.6.1  Control Register (CONTROL)
      2. 7.6.2  Charger Config Register A (CONFIG_A)
      3. 7.6.3  Charger Config Register B (CONFIG_B)
      4. 7.6.4  Charger Config Register C (CONFIG_C)
      5. 7.6.5  Charger Config Register D (CONFIG_D)
      6. 7.6.6  WLED Control Register (WLED)
      7. 7.6.7  Status Register A (STATUS_A)
      8. 7.6.8  Status Register B (STATUS_B)
      9. 7.6.9  Interrupt Register 1 (INT1)
      10. 7.6.10 Interrupt Register 2 (INT2)
      11. 7.6.11 Interrupt Register 3 (INT3)
      12. 7.6.12 Interrupt Mask Register 1 (MASK1)
      13. 7.6.13 Interrupt Mask Register 2 (MASK2)
      14. 7.6.14 Interrupt Mask Register 3 (MASK3)
      15. 7.6.15 Chip ID Register (CHIPID)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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5 Pin Configuration and Functions

YFF Package
36-Pin DSBGA
Bottom View, Top View
TPS65200 term_func1_lvsa48.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
A1 BAT O Output of the linear charger and battery voltage sense. Connect the battery from this pin to ground.
A2 CSOUT I Charge current-sense input. Battery current is sensed through the voltage drop across an external sense resistor. A 0.1-μF ceramic capacitor to PGND is required.
A3 CSIN I Charge current-sense input. Battery current is sensed through the voltage drop across an external sense resistor. A 0.1-μF ceramic capacitor to PGND is required.
A4 VDD O Internal supply for battery charger. Connect a 1-mF ceramic capacitor from this output to PGND. External load on VDD is not recommended.
A5 VSHRT I The voltage on this pin defines the battery voltage for transitioning from linear charge (pre-charge) to fast charge. A 10-µA current source is internally connected to this pin. Connect a resistor from this pin to ground to setup VSHORT reference. If the pin is left floating or tied to VDD an internal VSHORT reference of 2.1 V is used.
A6 DGND Digital ground
B1 PGND Power ground
B2
B3
B4 STAT O Charge status pin. Pulled low when charge in progress. Open drain for other conditions. This pin can also be controlled through I2C register. STAT can be used to drive a LED or communicate with a host processor.
B5 SGND Signal ground
B6 VZERO I This pin sets the zero-current output voltage level of the current shunt monitor.
C1 SWC O Internal switch to inductor connection (charger)
C2
C3
C4 OTG I Boost control pin. Boost mode is turned on whenever this pin is active. Polarity is user defined through I2C register. The pin is disabled by default and can be enabled through I2C register bit.
C5 VSHNT O Output of current shunt monitor. For positive currents (into battery) VSHNT > VZERO. For negative currents (out of the battery) VSHNT < VZERO.
C6 VSYS I Input supply for WLED driver and current shunt monitor
D1 PMID O Connection point between reverse blocking MOSFET and high-side switching MOSFET. Bypass it with a minimum of 1-μF capacitor from PMID to PGND. No other circuits are recommended to connect at PMID pin.
D2
D3
D4 INT O Interrupt pin (open-drain). This pin is pulled low to signal to the main processor that a fault has occurred.
D5 CTRL I Control pin of the LED boost regulator. It is a multi-functional pin which can be used for enable control and PWM dimming.
D6 LDO O LDO output. LDO is regulated to 4.9 V and drives 60-mA of current. Bypass LDO to GND with at least a 1-μF ceramic capacitor. LDO is enabled when VBUS is above the VBUS UVLO threshold.
E1 VBUS I/O Charger input voltage. Bypass it with a 1-μF ceramic capacitor from VBUS to PGND. It also provides power to the load in boost mode.
E2
E3 VIO I I/O reference voltage. A VIO level above 0.6 V disables automatic D+/D- detection.
E4 DP I USB port D+ input connection
E5 FB I Feedback pin for current. Connect the sense resistor from FB to GND.
E6 COMP O Output of the transconductance error amplifier. Connect an external capacitor to this pin to compensate the regulator.
F1 BOOT O Boot-strapped capacitor for the high-side MOSFET gate driver. Connect a 10-nF ceramic capacitor (voltage rating above 10 V) from BOOST pin to SWC pin.
F2 SDA I/O I2C interface data
F3 SCL I I2C interface clock
F4 DM I USB port D- input connection
F5 PGND Power ground
F6 SWL I This is the switching node of the LED driver. Connect the inductor from the supply to the SWL pin. This pin is also used to sense the output voltage for open LED protection.