ZHCSD50D December   2014  – February 2017 TPS62170-Q1 , TPS62171-Q1 , TPS62172-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable / Shutdown (EN)
      2. 8.3.2 Softstart
      3. 8.3.3 Power Good (PG)
      4. 8.3.4 Under Voltage Lockout (UVLO)
      5. 8.3.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode Operation
      3. 8.4.3 100% Duty-Cycle Operation
      4. 8.4.4 Current Limit and Short Circuit Protection
      5. 8.4.5 Operation Above TJ = 125°C
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical TPS62170-Q1 Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Programming the Output Voltage
        3. 9.2.2.3 External Component Selection
          1. 9.2.2.3.1 Inductor Selection
          2. 9.2.2.3.2 Capacitor Selection
            1. 9.2.2.3.2.1 Output Capacitor
            2. 9.2.2.3.2.2 Input Capacitor
        4. 9.2.2.4 Output Filter and Loop Stability
      3. 9.2.3 Application Performance Plots
    3. 9.3 System Examples
      1. 9.3.1 Inverting Power Supply
      2. 9.3.2 Various Output Voltages
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 开发支持
        1. 12.1.1.1 使用 WEBENCH® 工具定制设计方案
      2. 12.1.2 Third-Party Products Disclaimer
    2. 12.2 文档支持
      1. 12.2.1 相关文档 
    3. 12.3 相关链接
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 接收文档更新通知
    7. 12.7 社区资源
    8. 12.8 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Pin Configuration and Functions

8-Pin WSON
DSG Package
(Top View)
TPS62170-Q1 TPS62171-Q1 TPS62172-Q1 SLVSCK7_pinout.gif

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Pin Functions

PIN(1) I/O DESCRIPTION
NAME NUMBER
PGND 1 Power ground
VIN 2 I Supply voltage
EN 3 I Enable input (High = enabled, Low = disabled)
AGND 4 Analog ground
FB 5 I Voltage feedback of adjustable version. Connect resistive voltage divider to this pin. It is recommended to connect FB to AGND on fixed output voltage versions for improved thermal performance.
VOS 6 I Output voltage sense pin and connection for the control loop circuitry.
SW 7 O Switch node, which is connected to the internal MOSFET switches. Connect inductor between SW and output capacitor.
PG 8 O Output power good (High = VOUT ready, Low = VOUT below nominal regulation) ; open drain (requires pull-up resistor; goes high impedance, when device is switched off)
Exposed Thermal Pad Must be connected to AGND. Must be soldered to achieve appropriate power dissipation and mechanical reliability.
For more information about connecting pins, see Detailed Description and Application and Implementation sections.