SLVSAB4D June   2010  – January 2017 TPS61183

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Supply Voltage
      2. 7.3.2 Boost Regulator and Programmable Switch Frequency (FSCLT)
      3. 7.3.3 LED Current Sinks
      4. 7.3.4 Enable and Start-Up
      5. 7.3.5 IFB Pin Unused
    4. 7.4 Device Functional Modes
      1. 7.4.1 Brightness Dimming Control
      2. 7.4.2 Adjustable PWM Dimming Frequency and Mode Selection (R_FPWM/MODE)
      3. 7.4.3 Mode Selection - Programmable PWM Dimming or Direct PWM Dimming
      4. 7.4.4 Direct PWM Dimming
      5. 7.4.5 Overvoltage Clamp and Voltage Feedback (OVP/FB)
      6. 7.4.6 Current Sink Open Protection
      7. 7.4.7 Overcurrent and Short-Circuit Protection
      8. 7.4.8 Thermal Protection
      9. 7.4.9 Programmable PWM Dimming
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Inductor Selection
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Isolation FET Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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10 Layout

10.1 Layout Guidelines

As for all switching power supplies, especially those providing high current and using high switching frequencies, layout is an important design step. If layout is not carefully done, the regulator could show instability as well as EMI problems. Therefore, use wide and short traces for high-current paths. The input capacitor, C1 in the typical application circuit (see Typical Programmable PWM-Mode Application), must be close to the VIN pin, as well as to the GND pin in order to reduce the input ripple detected by the device. The input capacitor, C1 in the typical application circuit, must also be placed close to the inductor. C2 is the filter and noise decoupling capacitor for the internal linear regulator powering the internal digital circuits. Place C2 as close as possible between the VDDIO and AGND pins to prevent any noise insertion to the digital circuits. The SW pin carries high current with fast rising and falling edges. Therefore, keep the connection between the pin to the inductor and Schottky diode as short and wide as possible. It is also beneficial to have the ground of the output capacitor C3 close to the PGND pin as there is a large ground return current flowing between them. When laying out signal grounds, TI recommends using short traces separated from power ground traces, connected together at a single point, for example on the thermal pad. The thermal pad must be soldered on to the PCB and connected to the GND pin of the device. An additional thermal via can significantly improve device power dissipation.

10.2 Layout Example

TPS61183 layout_slvsab4.gif Figure 21. TPS61183 Layout