ZHCSJH2E November   2007  – April 2019 TPS61165

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      典型应用
  4. 4 修订历史记录
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Recommended Operating Conditions
    3. 7.3 Thermal Information
    4. 7.4 Electrical Characteristics
    5. 7.5 Timing Requirements
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Soft Start-Up
      2. 8.3.2 Open LED Protection
      3. 8.3.3 Undervoltage Lockout
      4. 8.3.4 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Maximum Output Current
      2. 9.1.2 Inductor Selection
      3. 9.1.3 Schottky Diode Selection
      4. 9.1.4 Compensation Capacitor Selection
      5. 9.1.5 Input and Output Capacitor Selection
    2. 9.2 Typical Applications
      1. 9.2.1 TPS61165 Typical Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 LED Brightness Dimming Mode Selection
          2. 9.2.1.2.2 PWM Brightness Dimming
          3. 9.2.1.2.3 Digital One-Wire Brightness Dimming
          4. 9.2.1.2.4 EasyScale: One-Wire Digital Dimming
          5. 9.2.1.2.5 Current Program
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Additional Application Circuits
    3. 9.3 Do's and Don'ts
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12器件和文档支持
    1. 12.1 器件支持
      1. 12.1.1 第三方产品免责声明
    2. 12.2 文档支持
      1. 12.2.1 相关文档
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

11.1 Layout Guidelines

As for all switching power supplies, especially those high frequency and high current ones, layout is an important design step. If layout is not carefully done, the regulator could suffer from instability as well as noise problems. To reduce switching losses, the SW pin rise and fall times are made as short as possible. To prevent radiation of high frequency resonance problems, proper layout of the high frequency switching path is essential. Minimize the length and area of all traces connected to the SW pin, and always use a ground plane under the switching regulator to minimize inter-plane coupling. The loop including the PWM switch, Schottky diode, and output capacitor, contains high current rising and falling in nanosecond and must be kept as short as possible. The input capacitor must be close to both the VIN pin and the GND pin to reduce the device supply ripple. Figure 20 shows a sample layout.