ZHCSE05A February   2015  – August 2015 TPS562210 , TPS563210

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 简化电路原理图
  5. 5 修订历史记录
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics: TPS562210
    8. 7.8 Typical Characteristics: TPS563210
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 The Adaptive On-Time Control and PWM Operation
      2. 8.3.2 Soft Start and Pre-Biased Soft Start
      3. 8.3.3 Power Good
      4. 8.3.4 Current Protection
      5. 8.3.5 Over Voltage Protection
      6. 8.3.6 UVLO Protection
      7. 8.3.7 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Advanced Eco-Mode™ Control
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 TPS562210 4.5-V to 17-V Input, 1.05-V output Converter
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Output Voltage Resistors Selection
          2. 9.2.1.2.2 Output Filter Selection
          3. 9.2.1.2.3 Input Capacitor Selection
          4. 9.2.1.2.4 Bootstrap capacitor Selection
        3. 9.2.1.3 Application Curves
      2. 9.2.2 TPS563210 4.5-V To 17-V Input, 1.05-V Output Converter
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedures
          1. 9.2.2.2.1 Output Filter Selection
        3. 9.2.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 相关链接
    2. 12.2 社区资源
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

11 Layout

11.1 Layout Guidelines

  1. VIN and GND traces should be as wide as possible to reduce trace impedance. The wide areas are also of advantage from the view point of heat dissipation.
  2. The input capacitor and output capacitor should be placed as close to the device as possible to minimize trace impedance.
  3. Provide sufficient vias for the input capacitor and output capacitor.
  4. Keep the SW trace as physically short and wide as practical to minimize radiated emissions.
  5. Do not allow switching current to flow under the device.
  6. A separate VOUT path should be connected to the upper feedback resistor.
  7. Make a Kelvin connection to the GND pin for the feedback path.
  8. Voltage feedback loop should be placed away from the high-voltage switching trace, and preferably has ground shield.
  9. The trace of the VFB node should be as small as possible to avoid noise coupling.
  10. The GND trace between the output capacitor and the GND pin should be as wide as possible to minimize its trace impedance.

11.2 Layout Example

TPS562210 TPS563210 Layout_slvsCM6.gif