ZHCSQ73 april   2023 TPS552892-Q1

PRODUCTION DATA  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VCC Power Supply
      2. 7.3.2  EXTVCC Power Supply
      3. 7.3.3  Input Undervoltage Lockout
      4. 7.3.4  Enable and Programmable UVLO
      5. 7.3.5  Soft Start
      6. 7.3.6  Shutdown
      7. 7.3.7  Switching Frequency
      8. 7.3.8  Switching Frequency Dithering
      9. 7.3.9  Inductor Current Limit
      10. 7.3.10 Internal Charge Path
      11. 7.3.11 Output Voltage Setting
      12. 7.3.12 Output Current Monitoring and Cable Voltage Droop Compensation
      13. 7.3.13 Output Current Limit
      14. 7.3.14 Overvoltage Protection
      15. 7.3.15 Output Short Circuit Protection
      16. 7.3.16 Power Good
      17. 7.3.17 Constant Current Output Indication
      18. 7.3.18 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Mode
      2. 7.4.2 Power Save Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Switching Frequency
        2. 8.2.2.2 Output Voltage Setting
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Input Capacitor
        5. 8.2.2.5 Output Capacitor
        6. 8.2.2.6 Output Current Limit
        7. 8.2.2.7 Loop Stability
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 第三方产品免责声明
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  10. 10Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
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订购信息

8.2.2.6 Output Current Limit

The output current limit is implemented by putting a current sense resistor between the ISP and ISN pins. The value of the limit voltage between the ISP and ISN pins is 50 mV. The current sense resistor between the ISP and ISN pins should be selected to ensure that the output current limit is set high enough for output. The output current limit setting resistor is given by Equation 18.

Equation 18. GUID-441AF7DA-56D3-4357-ACE1-CB8EAE265780-low.gif

where

  • VSNS is the current limit setting voltage between the ISP and ISN pins
  • IOUT_LIMIT is the desired output current limit

Because the power dissipation is large, make sure the current sense resistor has enough power dissipation capability with large package.