8.2.2.7 Compensation Components

The external compensation used with the TPS54332 allows for a wide range of output filter configurations. A large range of capacitor values and types of dielectric are supported. The design example uses ceramic X5R dielectric output capacitors, but other types are supported.

A Type II compensation scheme is recommended for the TPS54332. The compensation components are chosen to set the desired closed-loop crossover frequency and phase margin for output filter components. The type II compensation has the following characteristics; a DC gain component, a low-frequency pole, and a mid-frequency zero or pole pair.

The DC gain is determined by Equation 17.

Where:

V_ggm = 800
V_REF = 0.8 V

The low-frequency pole is determined by Equation 18.

R_OA = 8.696 MΩ.

The mid-frequency zero is determined by Equation 19.

And, the mid-frequency pole is given by Equation 20.

The first step is to choose the closed-loop crossover frequency. The closed-loop crossover frequency should be less than 1/8 of the minimum operating frequency, but for the TPS54332 it is recommended that the maximum closed-loop crossover frequency be not greater than 75 kHz. Next, the required gain and phase boost of the crossover network needs to be calculated. By definition, the gain of the compensation network must be the inverse of the gain of the modulator and output filter. For this design example, where the ESR zero is much higher than the closed-loop crossover frequency, the gain of the modulator and output filter can be approximated by Equation 21.

Where:

R_SENSE = 1 Ω / 12

F_CO = Closed-loop crossover frequency

C_O = Output capacitance

The phase loss is given by Equation 22.

Where:

R_ESR = Equivalent series resistance of the output capacitor

R_O = V_O/I_O

The measured overall loop response for the circuit is given in Figure 20. Note that the actual closed-loop crossover frequency is higher than intended at about 25 kHz. This is primarily due to variation in the actual values of the output filter components and tolerance variation of the internal feed-forward gain circuitry. Overall the design has greater than 60 degrees of phase margin and will be completely stable over all combinations of line and load variability.

Now that the phase loss is known the required amount of phase boost to meet the phase margin requirement can be determined. The required phase boost is given by Equation 23.

Where PM = the desired phase margin.

A zero / pole pair of the compensation network will be placed symmetrically around the intended closed-loop frequency to provide maximum phase boost at the crossover point. The amount of separation can be determined by Equation 24 and the resultant zero and pole frequencies are given by Equation 25 and Equation 26.

The low-frequency pole is set so that the gain at the crossover frequency is equal to the inverse of the gain of the modulator and output filter. Due to the relationships established by the pole and zero relationships, the value of R_Z can be derived directly by Equation 27 .

Where:

V_O = Output voltage

C_O = Output capacitance

F_CO = Desired crossover frequency

R_OA = 8.696 MΩ

GM_COMP = 12 A/V

V_ggm = 800

V_REF = 0.8 V

With R_Z known, C_Z and C_P can be calculated using Equation 28 and Equation 29.

For this design, the two 47-μF output capacitors are used. For ceramic capacitors, the actual output capacitance is less than the rated value when the capacitors have a DC bias voltage applied. This is the case in a dc/dc converter. The actual output capacitance may be as low as 54 μF. The combined ESR is approximately .001 Ω.

Using Equation 21 and Equation 22, the output stage gain and phase loss are equivalent as:

Gain = –6.94 dB

and

PL - –93.94 degrees

For 70 degrees of phase margin, Equation 23 requires 63.64 degrees of phase boost.

Equation 24, Equation 25, and Equation 26 are used to find the zero and pole frequencies of:

F_Z1 = 11.57 kHz

And

F_P1 = 216 kHz

R_Z, C_Z, and C_P are calculated using Equation 27, Equation 28, and Equation 29.

Using standard values for R3, C6, and C7 in the application schematic of Figure 12.

R3 = 75 kΩ

C6 = 180 pF

C7 = 10 pF