ZHCSSP5D January   2009  – September 2023 TPS54332

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics: Characterization Curves
    8. 6.8 Typical Characteristics: Supplemental Application Curves
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Voltage Reference (Vref)
      3. 7.3.3  Bootstrap Voltage (BOOT)
      4. 7.3.4  Enable and Adjustable Input Undervoltage Lockout (VIN UVLO)
      5. 7.3.5  Programmable Slow Start Using the SS Pin
      6. 7.3.6  Error Amplifier
      7. 7.3.7  Slope Compensation
      8. 7.3.8  Current Mode Compensation Design
      9. 7.3.9  Overcurrent Protection and Frequency Shift
      10. 7.3.10 Overvoltage Transient Protection
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With VIN < 3.5 V
      2. 7.4.2 Operation With EN Control
      3. 7.4.3 Eco-mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design with WEBENCH® Tools
        2. 8.2.2.2  Switching Frequency
        3. 8.2.2.3  Output Voltage Set Point
        4. 8.2.2.4  Input Capacitors
        5. 8.2.2.5  Output Filter Components
        6. 8.2.2.6  Inductor Selection
        7. 8.2.2.7  Capacitor Selection
        8. 8.2.2.8  Compensation Components
        9. 8.2.2.9  Bootstrap Capacitor
        10. 8.2.2.10 Catch Diode
        11. 8.2.2.11 Output Voltage Limitations
        12. 8.2.2.12 Power Dissipation Estimate
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Estimated Circuit Area
      4. 8.4.4 Electromagnetic Interference (EMI) Considerations
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Custom Design with WEBENCH® Tools
    2. 9.2 支持资源
    3. 9.3 接收文档更新通知
    4. 9.4 Trademarks
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10Mechanical, Packaging, and Orderable Information

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8.2.2.4 Input Capacitors

The TPS54332 requires an input decoupling capacitor and depending on the application, a bulk-input capacitor. The typical recommended value for the decoupling capacitor is 10 μF. TI recommends a high-quality ceramic type X5R or X7R. The voltage rating must be greater than the maximum input voltage. A smaller value can be used as long as all other requirements are met; however 10 μF has been shown to work well in a wide variety of circuits. Additionally, some bulk capacitance can be needed, especially if the TPS54332 circuit is not located within about 2 inches from the input voltage source. The value for this capacitor is not critical but must be rated to handle the maximum input voltage including ripple voltage, and must filter the output so that input ripple voltage is acceptable. For this design, a single 10-μF capacitor is used for the input decoupling capacitor that is X5R dielectric rated for 25 V. The equivalent series resistance (ESR) is approximately 3 mΩ, and the current rating is 3 A.

This input ripple voltage can be approximated by Equation 6.

Equation 6. ∆ V I N = I O U T M A X × 0.25 C B U L K × F S W + I O U T M A X × E S R M A X

Where IOUT(MAX) is the maximum load current, fSW is the switching frequency (derated by a factor of 0.8), CBULK is the bulk capacitor value and ESRMAX is the maximum series resistance of the bulk capacitor.

The maximum RMS input ripple current also needs to be checked. For worst case conditions, this can be approximated by Equation 7.

Equation 7. I C I N = I O U T M A X 2

In this case, the input ripple voltage is 98 mV and the RMS ripple current is 1.75 A. Make sure to note that the actual input voltage ripple is greatly affected by parasitic associated with the layout and the output impedance of the voltage source. The actual input voltage ripple for this circuit is shown in Design Parameters and is larger than the calculated value. This measured value is still below the specified input limit of 200 mV. The maximum voltage across the input capacitors is VIN max plus ΔVIN/2. The chosen bypass capacitor is rated for 25 V and the ripple current capacity is greater than 3 A, providing ample margin. Make sure that the maximum ratings for voltage and current are not exceeded under any circumstance.