ZHCSH69 December 2017 TPS40345
PRODUCTION DATA.
The input voltage ripple is divided between capacitance and ESR. For this design VRIPPLE(cap) = 150 mV and VRIPPLE(esr) = 150 mV. The minimum capacitance and maximum ESR are estimated by Equation 11.
The RMS current in the input capacitors is estimated by Equation 13.
Three 1210, 10-µF, 25-V, X5R ceramic capacitors are selected. Higher voltage capacitors are selected to minimize capacitance loss at the DC bias voltage to ensure the capacitors allow sufficient capacitance at the working voltage.