ZHCSM86E october   2020  – august 2023 TPS37

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Device Comparison
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Timing Diagrams
    8. 7.8 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage (VDD)
        1. 8.3.1.1 Undervoltage Lockout (VPOR < VDD < UVLO)
        2. 8.3.1.2 Power-On Reset (VDD < VPOR )
      2. 8.3.2 SENSE
        1. 8.3.2.1 SENSE Hysteresis
      3. 8.3.3 Output Logic Configurations
        1. 8.3.3.1 Open-Drain
        2. 8.3.3.2 Push-Pull
        3. 8.3.3.3 Active-High (RESET)
        4. 8.3.3.4 Active-Low (RESET)
      4. 8.3.4 User-Programmable Reset Time Delay
        1. 8.3.4.1 Reset Time Delay Configuration
      5. 8.3.5 User-Programmable Sense Delay
        1. 8.3.5.1 Sense Time Delay Configuration
      6. 8.3.6 Manual RESET (CTR1 / MR) and (CTR2 / MR) Input
  10. Device Functional Modes
  11. 10Application and Implementation
    1. 10.1 Adjustable Voltage Thresholds
      1. 10.1.1 Application Curves
    2. 10.2 Application Information
      1. 10.2.1 Typical Application
        1. 10.2.1.1 Design 1: High Voltage – Fast AC Signal Monitoring For Power Fault Detection
          1. 10.2.1.1.1 Design Requirements
          2. 10.2.1.1.2 Detailed Design Procedure
    3. 10.3 Power Supply Recommendations
      1. 10.3.1 Power Dissipation and Device Operation
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
      3. 10.4.3 Creepage Distance
  12. 11Device and Documentation Support
    1. 11.1 Device Nomenclature
    2. 11.2 支持资源
    3. 11.3 Trademarks
    4. 11.4 静电放电警告
    5. 11.5 术语表

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订购信息
Detailed Design Procedure

The main advantage of this unique application is being able to monitor a single AC source with a known operating frequency AC source rail. Because the TPS37A is an over and undervoltage detector with delay function, detecting faults either from a change of operating frequency range or voltage amplitude of the AC source is achievable.

Figure 10-5 illustrates an example of how the TPS37A is monitoring an AC source. Input to SENSE1 of TPS37A is monitoring a full wave rectifier DC signal. The DC signal is the result from the rectification of the 24 VAC source and monitors the AC source for overvoltage events due to a change of voltage amplitude or an increase to operating frequency. Input to SENSE2 of TPS37A will monitor the AC source by using a "resistive-drop" supply topology circuit. The unique circuit resistively divides the AC voltage signal and provides only the positive half wave Figure 10-5 into SENSE2 input. The half wave signal does not go through any output filter and hence any change to the AC voltage or operating frequency can be rapidly detected. Knowing the operating frequency of the AC source and converting to the time domain, the TPS37A SENSE2 delay can be programmed, by the capacitor on CTS2 pin, to equal or be greater than one-half of the operating period (the frequency of the half wave rectification signal) or the half cycle shown in Figure 10-5. When the half wave voltage amplitude falls below the SENSE2 threshold voltage, the SENSE2 time delay counter begins to increment. If the next half wave voltage amplitude exceeds the SENSE2 threshold voltage, the SENSE2 time delay counter will reset and the TPS37A RESET2 pin will indicate no fault was detected. Conversely, if the voltage amplitude of the half wave does not reach the SENSE2 threshold voltage within the programmed time delay of tCTS, a fault will occur. Also, a fault can occur if the operating frequency from the AC source decreases, resulting in lower AC voltage amplitude at the programmed time delay tCTS.

GUID-20201002-CA0I-QJB1-HC8W-Z0MJFNNGM7W9-low.svgFigure 10-5 Design 2 Timing Diagram

The TPS37A, with its ability of having a wide VDD range from 2.7 V to 65 V and under and overvoltage detection, offers a unique “window operating” AC power rail monitoring solution. Combining SENSE delay feature with the "resistive-drop" supply circuitry, detecting an undervoltage event on the half cycle of the AC power rail provides a fast power fault response. Likewise, the TPS37A provides an overvoltage monitoring and SENSE delay fault detection for the same AC power rail. With under and overvoltage supervision of the AC power rail, applications needing a specific operating DC range to protect its subsystems is achieve through TPS37A. Good design practice recommends using a 0.1-µF capacitor on the VDD pin and this capacitance may need to increase if using an adjustable version with a resistor divider.

Note that this design solution is not isolated and one must take into account when planning to use in high power systems.