SLVSAU6I June   2011  – May 2026 TPS2000C , TPS2001C , TPS2041C , TPS2051C , TPS2061C , TPS2065C , TPS2065C-2 , TPS2068C , TPS2069C , TPS2069C-2

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: SOT-23
    5. 6.5 Thermal Information: MSOP-PowerPAD
    6. 6.6 Electrical Characteristics: TJ = TA = 25°C
    7. 6.7 Electrical Characteristics: –40°C ≤ TJ ≤ 125°C
    8. 6.8 Timing Requirements: TJ = TA = 25°C
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout
      2. 7.3.2 Enable
      3. 7.3.3 Internal Charge Pump
      4. 7.3.4 Current Limit
      5. 7.3.5 FLT
      6. 7.3.6 Output Discharge
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitance
      3. 8.2.3 Application Curves
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation and Junction Temperature
  12. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

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6.2 ESD Ratings

VALUEUNIT
V(ESD)Electrostatic dischargeHuman-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)±2000V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)±500
IEC 61000-4-2 contact discharge±8000
IEC 61000-4-2 air-gap discharge(3)±15000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) VOUT was surged on a PCB with input and output bypassing per the Typical Application Diagram on the first page (except input capacitor was 22 µF) with no device failures.