ZHCSXY7C April 1992 – March 2025 TPIC6595
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK) respectively. Write data and read data are valid only when RCK is low. The storage register transfers data to the output buffer when shift register clear (SRCLR) is high.