SLOS474E August   2005  – March 2016 TPA2005D1-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Operating Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Fully Differential Amplifier
        1. 9.3.1.1 Advantages Of Fully Differential Amplifiers
      2. 9.3.2 Efficiency and Thermal Information
      3. 9.3.3 Eliminating the Output Filter With the TPA2005D1-Q1
        1. 9.3.3.1 Effect On Audio
        2. 9.3.3.2 Traditional Class-D Modulation Scheme
        3. 9.3.3.3 TPA2005D1-Q1 Modulation Scheme
        4. 9.3.3.4 Efficiency: Why You Must Use a Filter With The Traditional Class-D Modulation Scheme
        5. 9.3.3.5 Effects Of Applying a Square Wave Into a Speaker
        6. 9.3.3.6 When to Use an Output Filter
    4. 9.4 Device Functional Modes
      1. 9.4.1 Summing Input Signals With the TPA2005D1-Q1
        1. 9.4.1.1 Summing Two Differential Input Signals
        2. 9.4.1.2 Summing A Differential Input Signal And A Single-Ended Input Signal
        3. 9.4.1.3 Summing Two Single-Ended Input Signals
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 TPA2005D1-Q1 With Differential Input
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Component Selection
          2. 10.2.1.2.2 Input Resistors (RI)
          3. 10.2.1.2.3 Decoupling Capacitor (CS)
        3. 10.2.1.3 Application Curve
      2. 10.2.2 TPA2005D1-Q1 With Differential Input and Input Capacitors
        1. 10.2.2.1 Detailed Design Requirements
          1. 10.2.2.1.1 Input Capacitors (CI)
      3. 10.2.3 TPA2005D1-Q1 With Single-Ended Input
  11. 11Power Supply Recommendations
    1. 11.1 Power Supply Decoupling Capacitors
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Component Location
      2. 12.1.2 Trace Width
      3. 12.1.3 8-Pin QFN (DRB) Layout
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Community Resource
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Pin Configuration and Functions

DRB Package
8-Pin SON With Exposed Thermal Pad
Top View
DGN Package
8-Pin MSOP-PowerPAD
Top View
The thermal pad of the DRB and DGN packages must be electrically and thermally connected to a ground plane.

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
IN– 4 I Negative differential input
IN+ 3 I Positive differential input
VDD 6 I Power supply
VO+ 5 O Positive BTL output
GND 7 I High-current ground
VO– 8 O Negative BTL output
SHUTDOWN 1 I Shutdown terminal (active low logic)
NC 2 — No internal connection
Thermal Pad — Must be soldered to a grounded pad on the PCB.