ZHCSIX4H August   2007  – December 2018 TMP102

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
    1.     简化电路原理图
  3. 3 说明
    1.     方框图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Digital Temperature Output
        1. Table 2. 12-Bit Temperature Data Format
      2. 7.3.2  Serial Interface
      3. 7.3.3  Bus Overview
      4. 7.3.4  Serial Bus Address
      5. 7.3.5  Writing and Reading Operation
      6. 7.3.6  Slave Mode Operations
        1. 7.3.6.1 Slave Receiver Mode
        2. 7.3.6.2 Slave Transmitter Mode
      7. 7.3.7  SMBus Alert Function
      8. 7.3.8  General Call
      9. 7.3.9  High-Speed (HS) Mode
      10. 7.3.10 Timeout Function
      11. 7.3.11 Timing Diagrams
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuos-Conversion Mode
      2. 7.4.2 Extended Mode (EM)
      3. 7.4.3 Shutdown Mode (SD)
      4. 7.4.4 One-Shot/Conversion Ready (OS)
      5. 7.4.5 Thermostat Mode (TM)
        1. 7.4.5.1 Comparator Mode (TM = 0)
        2. 7.4.5.2 Interrupt Mode (TM = 1)
    5. 7.5 Programming
      1. 7.5.1 Pointer Register
        1. Table 7. Pointer Addresses
      2. 7.5.2 Temperature Register
        1. Table 8. Byte 1 of Temperature Register
        2. Table 9. Byte 2 of Temperature Register
      3. 7.5.3 Configuration Register
        1. Table 10. Byte 1 of Configuration and Power-Up or Reset Format
        2. Table 11. Byte 2 of Configuration and Power-Up or Reset Format
        3. 7.5.3.1   Shutdown Mode (SD)
        4. 7.5.3.2   Thermostat Mode (TM)
        5. 7.5.3.3   Polarity (POL)
        6. 7.5.3.4   Fault Queue (F1/F0)
        7. 7.5.3.5   Converter Resolution (R1/R0)
        8. 7.5.3.6   One-Shot (OS)
        9. 7.5.3.7   EM Bit
        10. 7.5.3.8   Alert (AL Bit)
        11. 7.5.3.9   Conversion Rate (CR)
      4. 7.5.4 High- and Low-Limit Registers
        1. Table 13. Byte 1 Temperature Register HIGH
        2. Table 14. Byte 2 Temperature Register HIGH
        3. Table 15. Byte 1 Temperature Register LOW
        4. Table 16. Byte 2 Temperature Register LOW
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 术语表
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.6 Timing Requirements

See the Timing Diagrams section for additional information.
FAST MODE HIGH-SPEED MODE UNIT
MIN TYP MAX MIN TYP MAX
ƒ(SCL) SCL operating frequency V+ 0.001 0.4 0.001 2.85 MHz
t(BUF) Bus-free time between STOP and START condition See Figure 7 600 160 ns
t(HDSTA) Hold time after repeated START condition.
After this period, the first clock is generated.		 600 160 ns
t(SUSTA) repeated start condition setup time 600 160 ns
t(SUSTO) STOP condition setup time 600 160 ns
t(HDDAT) Data hold time 100 900 25 105 ns
t(SUDAT) Data setup time 100 25 ns
t(LOW) SCL-clock low period V+ , see Figure 7 1300 210 ns
t(HIGH) SCL-clock high period See Figure 7 600 60 ns
tFD Data fall time See Figure 7 300 80 ns
tRD Data rise time See Figure 7 300 ns
SCLK ≤ 100 kHz, see Figure 7 1000 ns
tFC Clock fall time See Figure 7 300 40 ns
tRC Clock rise time See Figure 7 300 40 ns