UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
These devices are immune to quick voltage transient or excursion on VDD. Sensitivity to transients depends on both transient duration and transient overdrive. Overdrive is defined by how much VDD exceeds the specified threshold. Threshold overdrive is calculated as a percent of the threshold in question, as shown in Equation 1.
TLV80xE and TLV81xE devices have built-in glitch immunity (tGI) of 10 µs typical as shown in Timing Requirements. Figure 30 shows that VDD must fall below VIT- for tGI, otherwise the faling transistion is ignored. When VDD falls below VIT- for tGI, RESET transitions low to indicate a fault condition after the propagation delay high-to-low (tPDHL). When VDD rises above VIT+, RESET only deasserts to logic high indicating there is no more fault condition only if VDD remains above VIT+ for longer than the reset delay (tD).