ZHCSEH4A September   2015  – December 2015 TLV27L2-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
  4. 修订历史记录
  5. Selection Guide
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Offset Voltage
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 General Configurations
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Shunt Resistor (RSHUNT)
        2. 9.2.2.2 Operational Amplifiers
        3. 9.2.2.3 Reference Voltage Resistors (R5-R6)
        4. 9.2.2.4 Difference Amplifier Gain Setting Resistors (R1-R4)
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 General Power Dissipation Considerations
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 社区资源
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 Glossary
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Layout

Layout Guidelines

To achieve the levels of high performance of the TLV27L2-Q1 device, follow proper printed-circuit board design techniques. The following list is a general set of guidelines:

  • Ground planes—Using a ground plane on the board is highly recommended to provide all components with a low inductive-ground connection. However, in the areas of the amplifier inputs and output, the ground plane can be removed to minimize the stray capacitance.
  • Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic capacitor on each supply terminal. Sharing the tantalum capacitor among several amplifiers is possible depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less effective. The designer should strive for distances of less than 0.1 inches between the device power terminals and the ceramic capacitors.
  • Sockets—Sockets can be used but are not recommended. The additional lead inductance in the socket pins will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board are the best implementation.
  • Short trace runs and compact part placements—Optimum high performance is achieved when stray series inductance has been minimized. To achieve this performance, the circuit layout should be as compact as possible, thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of the amplifier. The length should be kept as short as possible which helps minimize stray capacitance at the input of the amplifier.
  • Surface-mount passive components—Using surface-mount passive components is recommended for high performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray inductance and capacitance. If leaded components are used, keep the lead lengths as short as possible.

Layout Example

TLV27L2-Q1 layout_example_bos620.gif Figure 30. TLV27L2-Q1 Layout Example

General Power Dissipation Considerations

Use to calculate the maximum power dissipation for a given θJA.

TLV27L2-Q1 equation_los378.gif

where

  • PD = Maximum power dissipation of TLV27L2-Q1 IC (watts)
  • TMAX = Absolute maximum junction temperature (150°C)
  • TA = Free-ambient air temperature (°C)
  • θJA = θJC + θCA
    • θJC = Thermal coefficient from junction to case
    • θCA = Thermal coefficient from case to ambient air (°C/W)
TLV27L2-Q1 max_pow_diss_slos922.gif
TJ = 150°C
Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 31. Maximum Power Dissipation vs Free-Air Temperature