ZHCSH83 December   2017 TLV2172-Q1

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     简化电路原理图
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: TLV2172-Q1
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Characteristics
      2. 7.3.2 Phase-Reversal Protection
      3. 7.3.3 Electrical Overstress
      4. 7.3.4 Capacitive Load and Stability
    4. 7.4 Device Functional Modes
      1. 7.4.1 Common-Mode Voltage Range
      2. 7.4.2 Overload Recovery
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 开发支持
        1. 11.1.2.1 TINA-TI™(免费软件下载)
        2. 11.1.2.2 DIP 适配器 EVM
        3. 11.1.2.3 通用运放 EVM
        4. 11.1.2.4 TI 高精度设计
        5. 11.1.2.5 WEBENCH滤波器设计器
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 相关链接
    4. 11.4 接收文档更新通知
    5. 11.5 社区资源
    6. 11.6 商标
    7. 11.7 静电放电警告
    8. 11.8 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Typical Characteristics

at VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)

Table 1. Characteristic Performance Measurements

DESCRIPTIONFIGURE
Offset Voltage Production Distribution Figure 1
Offset Voltage vs Common-Mode Voltage Figure 2
Offset Voltage vs Common-Mode Voltage (Upper Stage) Figure 3
Input Bias Current vs Temperature Figure 4
Output Voltage Swing vs Output Current (Maximum Supply) Figure 5
CMRR and PSRR vs Frequency (Referred-to-Input) Figure 6
0.1-Hz to 10-Hz Noise Figure 7
Input Voltage Noise Spectral Density vs Frequency Figure 8
Quiescent Current vs Supply Voltage Figure 9
Open-Loop Gain and Phase vs Frequency Figure 10
Closed-Loop Gain vs Frequency Figure 11
Open-Loop Output Impedance vs Frequency Figure 12
Small-Signal Overshoot vs Capacitive Load Figure 13, Figure 14
No Phase Reversal Figure 15
Small-Signal Step Response (10 mV) Figure 16, Figure 17
Large-Signal Step Response Figure 18, Figure 19
Large-Signal Settling Time Figure 20, Figure 21
Short-Circuit Current vs Temperature Figure 22
Maximum Output Voltage vs Frequency Figure 23
EMIRR IN+ vs Frequency Figure 24