SLOS467I October   2006  – July 2026 TL971 , TL972 , TL974

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings Old Die
    3. 5.3 ESD Ratings New Die
    4. 5.4 Recommended Operating Conditions
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Feature Description
      1. 6.2.1 Common-Mode Voltage Range
      2. 6.2.2 Operating Voltage
    3. 6.3 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Typical Application
      1. 7.1.1 Design Requirements
      2. 7.1.2 Detailed Design Procedure
        1. 7.1.2.1 Output Voltage Swing
    2. 7.2 Power Supply Recommendations
    3. 7.3 Layout
      1. 7.3.1 Layout Guidelines
      2. 7.3.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Third-Party Products Disclaimer
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • D|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

Common-Mode Voltage Range

The OPA97x is a 12V, true rail-to-rail input operational amplifier with an input common-mode range that extends to both supply rails. This wide range is achieved with paralleled complementary N-channel and P-channel differential input pairs, as shown in Figure 6-1. The N-channel pair is active for input voltages close to the positive rail, typically from (V+) – 1V to the positive supply. The P-channel pair is active for inputs from the negative supply to approximately (V+) – 2V. There is a small transition region, typically (V+) – 2V to (V+) – 1V, in which both input pairs are on. This transition region can vary modestly with process variation. Within this region, PSRR, CMRR, offset voltage, offset drift, noise, and THD performance can be degraded compared to operation outside this region.

For more information on common-mode voltage range and PMOS/NMOS pair interaction, see the Op Amps with Complementary-Pair Input Stages analog design journal.

TL971 TL972 TL974 Rail-to-Rail Input Stage Figure 6-1 Rail-to-Rail Input Stage