SLOS547A November   2008  – November 2015 THS4509-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS+ - VS- = 5 V
    6. 6.6 Electrical Characteristics: VS+ - VS- = 3 V
    7. 6.7 Typical Characteristics
      1. 6.7.1 Typical Characteristics: VS+ - VS- = 5 V
      2. 6.7.2 Typical Characteristics: VS+ - VS- = 3 V
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Test Circuits
        1. 8.1.1.1 Frequency Response
        2. 8.1.1.2 Distortion and 1-dB Compression
        3. 8.1.1.3 S-Parameter, Slew Rate, Transient Response, Settling Time, Output Impedance, Overdrive, Output Voltage, and Turn-On and Turn-Off Time
        4. 8.1.1.4 CM Input
        5. 8.1.1.5 CMRR and PSRR
      2. 8.1.2 Differential Input to Differential Output Amplifier
      3. 8.1.3 Single-Ended Input to Differential Output Amplifier
      4. 8.1.4 Input Common-Mode Voltage Range
      5. 8.1.5 Setting the Output Common-Mode Voltage
      6. 8.1.6 Single-Supply Operation (3 V to 5 V)
    2. 8.2 Typical Applications
      1. 8.2.1 THS4509-Q1 + ADS5500-EP Combined Performance
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 THS4509-Q1 + ADS5424-SP Combined Performance
        1. 8.2.2.1 Detailed Design Procedure
        2. 8.2.2.2 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 THS4509-Q1 EVM
      2. 10.1.2 EVM Warnings and Restrictions
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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5 Pin Configuration and Functions

RGT Package
16-Pin QFN
Top View
THS4509-Q1 pinout_los547.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
CM 4,9 I Common-mode voltage input
NC 1 — No internal connection
PD 12 I Power down, PD = logic low puts part into low-power mode, PD = logic high or open for normal operation
VIN– 2 I Inverting amplifier input
VIN+ 11 I Noninverting amplifier input
VOUT– 10 O Inverted amplifier output
VOUT+ 3 O Noninverted amplifier output
VS– 13, 14,
15, 16		 I Negative amplifier power supply input
VS+ 5, 6,
7, 8		 I Positive amplifier power-supply input