ZHCSJ74A December 2018 – January 2020 TCAN4550
PRODUCTION DATA.
The Addresses for each area of the device are as follows:
The start address must be word aligned (32-bit). Any time the registers are accessed, bits [1:0] of the address are ignored as the addresses are always word (32-bit/4-byte) aligned. As an example for accessing the M_CAN registers, for the register 0x1004, give the SPI address 1004, 1005, 1006 or 1007, and access register 1004. The registers are 32 bit and only 1004 is valid in this example.
When entering the MRAM start address, the 0x8000 prefix is not necessary. For example, if the desired start address is 0x8634, then bits SA[15:0] is 0x0634.
Table 7 provides programming op Codes.
NAME | OP CODE | DESCRIPTION | USAGE |
---|---|---|---|
WRITE_B_FL (burst: one SPI transfer Length: fixed) | 8'h61 | Write one or more addresses | < WRITE_B_FL > <2 address bytes>
<1 length bytes> <length words of write data> |
READ_B_FL (burst: one SPI transfer Length: fixed) | 8'h41 | Read one or more internal SPI addresses | < READ_B_FL > <2 address bytes>
<1 length bytes> <length words of read data> |
Notes: