TCA9554 具有中断输出和配置寄存器的低压 8 位 I2C 和系统管理总线 (SMbus) 低功耗输入输出 (I/O) 扩展器
- ZHCS616E March 2012 – February 2017 TCA9554
  
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TCA9554 具有中断输出和配置寄存器的低压 8 位 I2C 和系统管理总线 (SMbus) 低功耗输入输出 (I/O) 扩展器

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1 特性

I²C 至并行端口扩展器
开漏电路低电平有效中断输出
1.65V 至 5.5V 的工作电源电压范围
可耐受 5V 电压的 I/O 端口
400kHz 快速 I²C 总线
3 个硬件地址引脚可在 I²C/SMBus 上支持最多 8 个器件
输入和输出配置寄存器
极性反转寄存器
内部加电复位
低待机电流消耗

所用通道在加电时被配置为输入

加电时无毛刺脉冲

SCL/SDA 输入端上的噪声滤波器

具有最大高电流驱动能力的锁存输出，适用于直接驱动 LED

锁断性能超过 100mA，符合 JESD 78 II 类规范的要求）

静电放电 (ESD) 保护性能超过 JESD 22 规范的要求

2000V 人体放电模型 (A114-A)
1000V 充电器件模型 (C101)

2 应用

服务器
路由器（电信交换设备）
个人计算机
个人电子产品（例如：游戏机）
工业自动化
采用 GPIO 受限处理器的产品

3 说明

TCA9554 是一款 16 引脚器件，可为两线双向 I²C 总线（或 SMBus）协议提供 8 位通用并行输入和输出 (I/O) 扩展。该器件的工作电源电压范围为 1.65V 至 5.5V。器件支持 100kHz（标准模式）和 400kHz（快速模式）两种时钟频率。当开关、传感器、按钮、LED、风扇以及其他相似器件需要额外的 I/O 时，I/O 扩展器（如 TCA9554）可提供简单解决方案。

TCA9554 的功能包括当输入端口状态发生变化时，在 INT 引脚上生成中断。硬件可选地址引脚 A0、A1 和 A2 最多允许 8 个 TCA9554 器件位于同一 I²C 总线上。该器件还可通过电源循环供电以生成加电复位，从而复位到默认状态。

器件信息⁽¹⁾

器件型号	封装	封装尺寸（标称值）
TCA9554	TSSOP (16)	5.00mm x 4.40mm
	SSOP (16)	4.90mm × 3.90mm
	SSOP (16)	6.20mm x 5.30mm
	SOIC (16)	7.50mm x 10.30mm

如需了解所有可用封装，请参阅数据表末尾的可订购产品附录。

Device Images

简化框图

4 修订历史记录

Changes from D Revision (August 2015) to E Revision

Added DW 封装。Go
Added Maximum junction temperature to the Absolute Maximum Ratings table Go
Added I_OL for different T_j to the Recommended Operating Conditions tableGo
Changed I_CC standby into different input states, with increased maximums Go
Changed C_io, C_i maximum Go
Removed ΔI_CC spec from the Electrical Characteristics table, added ΔI_CC typical characteristics graph Go
Clarified interrupt reset time (t_ir) with respect to falling edge of ACK related SCL pulse. Go
Made changes to the Interrupt Output (INT) sectionGo
Made changes to the Reads section Go
Added the Calculating Junction Temperature and Power Dissipation sectionGo
Changed recommended supply sequencing values Go
Power on reset requirements relaxed Go

Changes from C Revision (May 2015) to D Revision

Added DB 封装。Go

Changes from B Revision (October 2014) to C Revision

Added standby mode current for V_I = V_CC test condition.Go
Changed ΔI_CC for one P-port input at V_I = V_CC - 0.6, and other P-port I/O at V_I= V_CC or GND.Go
Added clarification in datasheet that raising voltage above V_CC on P-port I/O will result in current flow from P-port to V_CC. Go

Changes from A Revision (March 2012) to B Revision

Added 处理额定值表，特性说明部分，器件功能模式，应用和实施部分，电源相关建议部分，布局部分，器件和文档支持部分以及机械、封装和可订购信息部分。Go
Updated I_OL PARAMETER in the Electrical Characteristics table.Go

Changes from * Revision (November 2011) to A Revision

最初发布的完整版本。Go

5 Pin Configuration and Functions

PW, DB, DBQ, or DW Package

16-Pin TSSOP, SSOP, SOIC

Top View

Pin Functions

PIN		I/O	DESCRIPTION
NAME	NO.	I/O	DESCRIPTION
A0	1	I	Address input. Connect directly to V_CC or ground
A1	2	I	Address input. Connect directly to V_CC or ground
A2	3	I	Address input. Connect directly to V_CC or ground
GND	8	—	Ground
INT	13	O	Interrupt output. Connect to V_CC through a pull-up resistor
P0	4	I/O	P-port input-output. Push-pull design structure. At power on, P0 is configured as an input
P1	5	I/O	P-port input-output. Push-pull design structure. At power on, P1 is configured as an input
P2	6	I/O	P-port input-output. Push-pull design structure. At power on, P2 is configured as an input
P3	7	I/O	P-port input-output. Push-pull design structure. At power on, P3 is configured as an input
P4	9	I/O	P-port input-output. Push-pull design structure. At power on, P4 is configured as an input
P5	10	I/O	P-port input-output. Push-pull design structure. At power on, P5 is configured as an input
P6	11	I/O	P-port input-output. Push-pull design structure. At power on, P6 is configured as an input
P7	12	I/O	P-port input-output. Push-pull design structure. At power on, P7 is configured as an input
SCL	14	I	Serial clock bus. Connect to V_CC through a pull-up resistor
SDA	15	I/O	Serial data bus. Connect to V_CC through a pull-up resistor
VCC	16	—	Supply voltage

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) ⁽¹⁾

			MIN	MAX	UNIT
V_CC	Supply voltage		–0.5	6	V
V_I	Input voltage ⁽²⁾		–0.5	6	V
V_O	Output voltage ⁽²⁾		–0.5	6	V
I_IK	Input clamp current	V_I < 0		–20	mA
I_OK	Output clamp current	V_O < 0		–20	mA
I_IOK	Input-output clamp current	V_O < 0 or V_O > V_CC		±20	mA
I_OL	Continuous output low current through a single P-port	V_O = 0 to V_CC		50	mA
I_OH	Continuous output high current through a single P-port	V_O = 0 to V_CC		–50	mA
I_CC	Continuous current through GND by all P-ports			250	mA
I_CC	Continuous current through V_CC			–160	mA
T_j(MAX)	Maximum junction temperature			100	°C
T_stg	Storage temperature		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions.

6.3 Recommended Operating Conditions

				MIN	MAX	UNIT
V_CC	Supply voltage			1.65	5.5	V
V_IH	High-level input voltage	SCL, SDA	V_CC = 1.65 V to 5.5 V	0.7 × V_CC	V_CC⁽¹⁾	V
		A0, A1, A2, P7–P0	V_CC = 1.65 V to 2.7 V	0.7 × V_CC	5.5
		A0, A1, A2, P7–P0	V_CC = 3 V to 5.5 V	0.8 × V_CC	5.5
V_IL	Low-level input voltage	SCL, SDA	V_CC = 1.65 V to 5.5 V	–0.5	0.3 × V_CC	V
		A0, A1, A2, P7–P0	V_CC = 1.65 V to 2.7 V	–0.5	0.3 × V_CC
		A0, A1, A2, P7–P0	V_CC = 3 V to 5.5 V	–0.5	0.2 × V_CC
I_OL	Low-level output current⁽²⁾	P00–P07, P10–P17	T_j ≤ 65°C		25	mA
			T_j ≤ 85°C		18
			T_j ≤ 100°C		9
		INT, SDA	T_j ≤ 85°C		6
		INT, SDA	T_j ≤ 100°C		3
I_OH	High-level output current	Any P-port, P7–P0			–10	mA
I_CC	Continuous current through GND	All P-ports P7-P0, INT, and SDA			200	mA
I_CC	Continuous current through V_CC	All P-ports P7-P0			–80	mA
T_A	Operating free-air temperature			–40	85	°C

(1) For voltages applied above V_CC, an increase in I_CC will result.

(2) The values shown apply to specific junction temperatures, which depend on the R_θJA of the package used. See the Calculating Junction Temperature and Power Dissipation section on how to calculate the junction temperature.

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		TCA9554				UNIT
		PW (TSSOP)	DBQ (SSOP)	DB (SSOP)	DW (SOIC)
		16 PINS	16 PINS	16 PINS	16 PINS
R_θJA	Junction-to-ambient thermal resistance	122	121.7	113.2	84.7	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	56.4	72.9	63.6	48	°C/W
R_θJB	Junction-to-board thermal resistance	67.1	64.2	64	49.1	°C/W
ψ_JT	Junction-to-top characterization parameter	10.8	24.4	21.2	22.7	°C/W
ψ_JB	Junction-to-board characterization parameter	66.5	63.8	63.4	48.7	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS		V_CC	MIN	TYP⁽¹⁾	MAX	UNIT
V_IK	Input diode clamp voltage	I_I = –18 mA		1.65 V to 5.5 V	–1.2			V
V_PORR	Power-on reset voltage, V_CC rising	V_I = V_CC or GND, I_O = 0				1.2	1.5	V
V_PORF	Power-on reset voltage, V_CC falling	V_I = V_CC or GND, I_O = 0			0.75	1		V
V_OH	P-port high-level output voltage⁽²⁾	I_OH = –8 mA		1.65 V	1.2			V
				2.3 V	1.8			V
				3 V	2.6
				4.5 V	4.1
		I_OH = –10 mA		1.65 V	1.1
				2.3 V	1.7
				3 V	2.5
				4.5 V	4
I_OL	SDA⁽⁴⁾	V_OL = 0.4 V		1.65 V to 5.5 V	3	11		mA
	P port⁽³⁾	V_OL = 0.5 V		1.65 V	8	10
				2.3 V	8	13
				3 V	8	15
				4.5 V	8	17
		V_OL = 0.7 V		1.65 V	10	14
				2.3 V	10	17
				3 V	10	20
				4.5 V	10	24
	INT⁽⁵⁾	V_OL = 0.4 V		1.65 V to 5.5 V	3	7
I_I	SCL, SDA	V_I = V_CC or GND		1.65 V to 5.5 V			±1	µA
I_I	A0, A1, A2	V_I = V_CC or GND		1.65 V to 5.5 V			±1	µA
I_IH	P port	V_I = V_CC		1.65 V to 5.5 V			1	µA
I_IL	P port	V_I = GND		1.65 V to 5.5 V			–100	µA
I_CC	Operating mode	V_I = V_CC or GND, I_O = 0, I/O = inputs, f_SCL = 400 kHz, no load, t_r,max = 300 ns		5.5 V		34		µA
				3.6 V		15
				2.7 V		9
				1.65 V		5
	Standby mode	I/O = inputs, f_SCL = 0 kHz	V_I = V_CC	5.5 V		1.9	3.5
				3.6 V		1.1	1.8
				2.7 V		1	1.6
				1.95 V		0.4	1
			V_I = GND	5.5 V		0.45	0.7	mA
				3.6 V		0.3	0.6
				2.7 V		0.23	0.5
				1.95 V		0.23	0.5
C_i	SCL	V_I = V_CC or GND		1.65 V to 5.5 V		3	8	pF
C_io	SDA	V_IO = V_CC or GND		1.65 V to 5.5 V		5.5	9.5	pF
C_io	P port	V_IO = V_CC or GND		1.65 V to 5.5 V		8	9.5	pF

(1) All typical values are at nominal supply voltage (1.8-, 2.5-, 3.3-, or 5-V V_CC) and T_A = 25°C.

(2) Each P-port I/O configured as a high output must be externally limited to a maximum of 10 mA, and the total current sourced by all I/Os (P-ports P7-P0) through V_CC must be limited to a maximum current of 80 mA.

(3) Each P-port I/O configured as a low output must be externally limited to a maximum of 25 mA, and the total current sunk by all I/Os (P-ports P7-P0, INT, and SDA) through GND must be limited to a maximum current of 200 mA.

(4) The SDA pin must be externally limited to a maximum of 12 mA, and the total current sunk by all I/Os (P-ports P7-P0, INT, and SDA) through GND must be limited to a maximum current of 200 mA.

(5) The INT pin must be externally limited to a maximum of 7 mA, and the total current sunk by all I/Os (P-ports P7-P0, INT, and SDA) through GND must be limited to a maximum current of 200 mA.

6.6 I²C Interface Timing Requirements

over operating free-air temperature range (unless otherwise noted) (see Figure 11)

			MIN	MAX	UNIT
STANDARD MODE
f_scl	I²C clock frequency		0	100	kHz
t_sch	I²C clock high time		4		µs
t_scl	I²C clock low time		4.7		µs
t_sp	I²C spike time			50	ns
t_sds	I²C serial-data setup time		250		ns
t_sdh	I²C serial-data hold time		0		ns
t_icr	I²C input rise time			1000	ns
t_icf	I²C input fall time			300	ns
t_ocf	I²C output fall time	10-pF to 400-pF bus		300	ns
t_buf	I²C bus free time between Stop and Start		4.7		µs
t_sts	I²C Start or repeated Start condition setup		4.7		µs
t_sth	I²C Start or repeated Start condition hold		4		µs
t_sps	I²C Stop condition setup		4		µs
t_vd(data)	Valid data time	SCL low to SDA output valid		3.45	µs
t_vd(ack)	Valid data time of ACK condition	ACK signal from SCL low to SDA (out) low		3.45	µs
C_b	I²C bus capacitive load			400	pF
FAST MODE
f_scl	I²C clock frequency		0	400	kHz
t_sch	I²C clock high time		0.6		µs
t_scl	I²C clock low time		1.3		µs
t_sp	I²C spike time			50	ns
t_sds	I²C serial-data setup time		100		ns
t_sdh	I²C serial-data hold time		0		ns
t_icr	I²C input rise time		20	300	ns
t_icf	I²C input fall time		20 × (V_DD / 5.5 V)	300	ns
t_ocf	I²C output fall time	10-pF to 400-pF bus	20 × (V_DD / 5.5 V)	300	ns
t_buf	I²C bus free time between Stop and Start		1.3		µs
t_sts	I²C Start or repeated Start condition setup		0.6		µs
t_sth	I²C Start or repeated Start condition hold		0.6		µs
t_sps	I²C Stop condition setup		0.6		µs
t_vd(data)	Valid data time			0.9	µs
t_vd(ack)	Valid data time of ACK condition			0.9	µs
C_b	I²C bus capacitive load			400	pF

6.7 Switching Characteristics

over operating free-air temperature range (unless otherwise noted) (see Figure 12 and Figure 13)

PARAMETER		FROM (INPUT)	TO (OUTPUT)	MIN	MAX	UNIT
STANDARD MODE and FAST MODE
t_iv	Interrupt valid time	P port	INT		4	µs
t_ir	Interrupt reset delay time	SCL	INT		4	µs
t_pv	Output data valid	SCL	P7–P0		350	ns
t_ps	Input data setup time	P port	SCL	100		ns
t_ph	Input data hold time	P port	SCL	1		µs

6.8 Typical Characteristics

T_A = 25°C (unless otherwise noted)

f_SCL = 400 kHz

I/Os = High or Low Inputs

Figure 1. Supply Current (I_CC, Operating Mode) vs Temperature (T_A) at Four Supply Voltages

f_SCL = 400 kHz

I/Os = High or Low Inputs

T_A = 25°C

Figure 3. Supply Current (I_CC, Operating Mode) vs Supply Voltage (V_CC)

T_A = 25°C

Figure 5. Sink Current (I_OL) vs Output Low Voltage (V_OL) for P-Ports at Four Supply Voltages

T_A = 25°C

Figure 7. Source Current (I_OH) vs Output High Voltage (V_OH) for P-Ports at Four Supply Voltages

V_CC = 5 V

Figure 9. Supply Current (I_CC) vs Number of I/Os Held Low (#)

f_SCL = 0 kHz

I/Os = High Inputs

Figure 2. Supply Current (ICC, Standby Mode) vs Temperature (T_A) at Four Supply Voltages

Figure 4. Output Low Voltage (V_OL) vs Temperature (T_A) for P-Port I/Os

Figure 6. Output High Voltage (V_CC – V_OH) vs Temperature (T_A) for P-Ports

T_A = 25°C

Figure 8. Output High Voltage (V_OH) vs Supply Voltage (V_CC) for P-Ports

Figure 10. Δ I_CC vs Temperature for Different V_CC
(V_I = V_CC – 0.6 V)

7 Parameter Measurement Information

A. C_L includes probe and jig capacitance.

B. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z_O = 50 Ω, t_r/t_f ≤ 30 ns.

C. All parameters and waveforms are not applicable to all devices.

Figure 11. I²C Interface Load Circuit and Voltage Waveforms

A. C_L includes probe and jig capacitance.

B. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z_O = 50 Ω, t_r/t_f ≤ 30 ns.

C. All parameters and waveforms are not applicable to all devices.

Figure 12. Interrupt Load Circuit and Voltage Waveforms

A. C_L includes probe and jig capacitance.

B. t_pv is measured from 0.7 × V_CC on SCL to 50% I/O (Pn) output.

C. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z_O = 50 Ω, t_r/t_f ≤ 30 ns.

D. The outputs are measured one at a time, with one transition per measurement.

E. All parameters and waveforms are not applicable to all devices.

Figure 13. P-Port Load Circuit and Voltage Waveforms

8 Detailed Description

8.1 Overview

The TCA9554 is an 8-bit I/O expander for the two-line bidirectional bus (I²C) is designed for 1.65-V to 5.5-V V_CC operation. It provides general-purpose remote I/O expansion for most micro-controller families via the I²C interface (serial clock, SCL, and serial data, SDA, pins).

The TCA9554 open-drain interrupt (INT) output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed. The INT pin can be connected to the interrupt input of a micro-controller. By sending an interrupt signal on this line, the remote I/O can inform the micro-controller if there is incoming data on its ports without having to communicate via the I²C bus. Thus, the TCA9554 can remain a simple slave device. The device outputs (latched) have high-current drive capability for directly driving LEDs.

Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I²C slave address and allow up to eight devices to share the same I²C bus or SMBus.

The system master can reset the TCA9554 in the event of a timeout or other improper operation by cycling the power supply and causing a power-on reset (POR). A reset puts the registers in their default state and initializes the I²C /SMBus state machine.

The TCA9554 consists of one 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity Inversion (active high or active low) registers. At power on, the I/Os are configured as inputs. However, the system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or output is kept in the corresponding Input Port or Output Port register. The polarity of the Input Port register can be inverted with the Polarity Inversion register. All registers can be read by the system master.

The TCA9554 and TCA9554A are identical except for their fixed I²C address. This allows for up to 16 of these devices (8 of each) on the same I²C/SMBus.

The TCA9554 is identical to the TCA9534 except for the addition of the internal I/O pull-up resistors, which keeps P-ports from floating when configured as inputs.