SCES625A February   2005  – November 2015 SN74VMEH22501A-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Live-Insertion Specifications
    7. 7.7  Timing Requirements for UBT Transceiver (I Version)
    8. 7.8  Switching Characteristics for Bus Transceiver Function (I Version)
    9. 7.9  Switching Characteristics for Bus Transceiver Function (M Version)
    10. 7.10 Switching Characteristics for UBT Transceiver (I Version)
    11. 7.11 Switching Characteristics for UBT Transceiver (M Version)
    12. 7.12 Switching Characteristics for Bus Transceiver Function (I Version)
    13. 7.13 Switching Characteristics for UBT (I Version)
    14. 7.14 Switching Characteristics for Bus Transceiver Function (I Version)
    15. 7.15 Switching Characteristics for UBT (I Version)
    16. 7.16 Skew Characteristics for Bus Transceiver (I Version)
    17. 7.17 Skew Characteristics for Bus Transceiver (M Version)
    18. 7.18 Skew Characteristics for UBT (I Version)
    19. 7.19 Skew Characteristics for UBT (M Version)
    20. 7.20 Skew Characteristics for Bus Transceiver (I Version)
    21. 7.21 Skew Characteristics for UBT (I Version)
    22. 7.22 Skew Characteristics for Bus Transceiver (I Version)
    23. 7.23 Skew Characteristics for UBT (I Version)
    24. 7.24 Maximum Data Transfer Rates
    25. 7.25 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Distributed-Load Backplane Switching Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Functional Description for Two 1-Bit Bus Transceivers
      2. 9.3.2 Functional Description for 8-Bit UBT Transceiver
      3. 9.3.3 VMEbus Summary
    4. 9.4 Device Functional Modes
      1. 9.4.1 Direction Control Model (1-Bit Transceiver)
      2. 9.4.2 Direction Control for 8 Bit UBT
      3. 9.4.3 Latch Storage and Clock Storage
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

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7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VCC,
BIAS VCC 		Supply voltage –0.5 4.6 V
VI Input voltage(2) –0.5 7 V
VO Voltage applied to any output in the high-impedance or power-off state(2) –0.5 7 V
VO Voltage applied to any output in the high or low state(2) 3A port or Y output –0.5 VCC + 0.5 V
B port –0.5 4.6
IO Output current in the low state 3A port or Y output 50 mA
B port 100
IO Output current in the high state 3A port or Y output –50 mA
B port –100
IIK Input clamp current VI < 0 –50 mA
IOK Output clamp current VO < 0 or VO > VCC, B port –50 mA
TJ Junction temperature –55 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

see (1)(2)
MIN NOM MAX UNIT
VCC,
BIAS VCC 		Supply voltage 3.15 3.3 3.45 V
VI Input voltage Control inputs or A port VCC 5.5 V
B port VCC 5.5
VIH High-level input voltage Control inputs or A port 2 V
B port 0.5 VCC + 50 mV
VIL Low-level input voltage Control inputs or A port 0.8 V
B port 0.5 VCC – 50 mV
IIK Input clamp current –18 mA
IOH High-level output current 3A port and Y output –12 mA
B port –48
IOL Low-level output current 3A port and Y output 12 mA
B port 64
Δt/Δv Input transition rise or fall rate Outputs enabled 10 ns/V
Δt/ΔVCC Power-up ramp rate 20 µs/V
TA Operating ambient temperature I version –40 85 °C
M version –55 125 °C
(1) All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, SCBA004.
(2) Proper connection sequence for use of the B-port I/O precharge feature is GND and BIAS VCC = 3.3 V first, I/O second, and VCC = 3.3 V last, because the BIAS VCC precharge circuitry is disabled when any VCC pin is connected. The control inputs can be connected at any time, but normally are connected during the I/O stage. If B-port precharge is not required, any connection sequence is acceptable, but generally, GND is connected first.

7.4 Thermal Information

THERMAL METRIC(1) SN74VMEH22501A-EP UNIT
DGV (TVSOP) DGG (TSSOP)
48 PINS 48 PINS
RθJA Junction-to-ambient thermal resistance, JEDEC 4-layer high-K board 73.9 62.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 26.1 15.8 °C/W
RθJB Junction-to-board thermal resistance 37.3 30.0 °C/W
ψJT Junction-to-top characterization parameter 1.9 0.7 °C/W
ψJB Junction-to-board characterization parameter 36.8 29.7 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

over recommended operating free-air temperature range for A and B ports (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
VIK VCC = 3.15 V II = –18 mA –1.2 V
VOH 3A port, any B ports,
and Y outputs		 VCC = 3.15 V to 3.45 V IOH = –100 µA VCC – 0.2 V
3A port and Y outputs VCC = 3.15 V IOH = –6 mA 2.4
IOH = –12 mA 2
Any B port VCC = 3.15 V IOH = –24 mA 2.4
IOH = –48 mA 2
VOL 3A port, any B ports,
and Y outputs		 VCC = 3.15 V to 3.45 V IOL = 100 µA 0.2 V
3A port and Y outputs VCC = 3.15 V IOL = 6 mA 0.55
IOL = 12 mA; I version;
TA = –40 to 85°C		 0.8
IOL = 12 mA; M version;
TA = –55 to 125°C		 0.84
Any B port VCC = 3.15 V IOL = 24 mA 0.4
IOL = 48 mA 0.55
IOL = 64 mA; I version 0.6
IOL = 64 mA; M version 0.7
II Control inputs,
1A and 2A		 VCC = 3.45 V VI = VCC or GND ±1 µA
VCC = 0 or 3.45 V VI = 5.5 V 5
I VERSION
IOZH(2) 3A port, any B port,
and Y outputs		 VCC = 3.45 V; TA = –40°C to 85°C VO = VCC or 5.5 V 5 µA
IOZL(2) 3A port and Y outputs VCC = 3.45 V; TA = –40°C to 85°C VO = GND –5 µA
Any B port VCC = 3.45 V; TA = –40°C to 85°C VO = GND –20
M VERSION
IOZH(2) 3A port, any B port,
and Y outputs		 VCC = 3.45 V; TA = –55°C to 125°C VO = VCC or 5.5 V 15 µA
IOZL(2) 3A port and Y outputs VCC = 3.45 V; TA = –55°C to 125°C VO = GND –8 µA
Any B port VCC = 3.45 V; TA = –55°C to 125°C VO = GND –35
GENERAL PARAMETERS
Ioff VCC = 0, BIAS VCC = 0 VI or VO = 0 to 5.5 V ±10 µA
IBHL(3) 3A port VCC = 3.15 V VI = 0.8 V 75 µA
IBHH(4) 3A port VCC = 3.15 V VI = 2 V –75 µA
IBHLO(5) 3A port VCC = 3.45 V VI = 0 to VCC 500 µA
IBHHO(6) 3A port VCC = 3.45 V VI = 0 to VCC –500 µA
IOZ(PU/PD)(7) VCC ≤ 1.3 V, VO = 0.5 V to VCC,
VI = GND or VCC, OE = Don't care		 ±10 µA
ICC VCC = 3.45 V, IO = 0,
VI = VCC or GND		 Outputs high 30 mA
Outputs low 30
Outputs disabled 30
ICCD VCC = 3.45 V, IO = 0,
VI = VCC or GND,
One data input switching at one-half clock frequency, 50% duty cycle		 Outputs enabled 76 µA/
clock
MHz/
input
Outputs disabled 19
ΔICC(8) VCC = 3.15 V to 3.45 V, One input at VCC – 0.6 V,
Other inputs at VCC or GND		 750 µA
Ci 1A and 2A inputs VI = 3.15 V or 0 2.8 pF
Control inputs 2.6
Co 1Y or 2Y outputs VO = 3.15 V or 0 5.6 pF
Cio 3A port VCC = 3.3 V VO = 3.3 V or 0 7.9 pF
Any B port 11 12.5
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
(2) For I/O ports, the parameters IOZH and IOZL include the input leakage current.
(3) The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND, then raising it to VIL max.
(4) The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to VCC, then lowering it to VIH min.
(5) An external driver must source at least IBHLO to switch this node from low to high.
(6) An external driver must sink at least IBHHO to switch this node from high to low.
(7) High-impedance state during power up or power down
(8) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.

7.6 Live-Insertion Specifications

over recommended operating free-air temperature range for B port
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
ICC (BIAS VCC) VCC = 0 to 3.15 V, BIAS VCC = 3.15 V to 3.45 V, IO(DC) = 0 5 mA
VCC = 3.15 V to 3.45 V(2), BIAS VCC = 3.15 V to 3.45 V, IO(DC) = 0 10 µA
VO VCC = 0, BIAS VCC = 3.15 V to 3.45 V 1.3 1.5 1.7 V
IO VCC = 0 VO = 0, BIAS VCC = 3.15 V –20 –100 µA
VO = 3 V, BIAS VCC = 3.15 V 20 100
(1) All typical values are at VCC = 3.3 V, TA = 25°C
(2) VCC – 0.5 V < BIAS VCC

7.7 Timing Requirements for UBT Transceiver (I Version)

over recommended operating conditions (unless otherwise noted) (see Figure 7 and Figure 8); TA = –40°C to 85°C
MIN MAX UNIT
fclock Clock frequency 120 MHz
tw Pulse duration LE high 2.5 ns
CLK high or low 3
tsu Setup time 3A before CLK↑ Data high 2.1 ns
Data low 2.2
3A before LE↓ CLK high 2
CLK low 2
3B before CLK↑ Data high 2.5
Data low 2.7
3B before LE↓ CLK high 2
CLK low 2
th Hold time 3A after CLK↑ Data high 0 ns
Data low 0
3A after LE↓ CLK high 1
CLK low 1
3B after CLK↑ Data high 0
Data low 0
3B after LE↓ CLK high 1
CLK low 1

7.8 Switching Characteristics for Bus Transceiver Function (I Version)

over recommended operating conditions (unless otherwise noted) (see Figure 7 and Figure 8); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP MAX UNIT
tPLH 1A or 2A 1B or 2B 4.5 9.2 ns
tPHL 4.2 7.8
tPLH 1A or 2A 1Y or 2Y 6.2 14.5 ns
tPHL 6.1 13
tPZH OEAB 1B or 2B 3.6 8.1 ns
tPZL 3.4 7.8
tPHZ OEAB 1B or 2B 3.3 9.7 ns
tPLZ 1.8 4.8
tr Transition time, B port (10%–90%) 4.3 ns
tf Transition time, B port (90%–10%) 4.3 ns
tPLH 1B or 2B 1Y or 2Y 1.6 5.6 ns
tPHL 1.6 5.6
tPZH OEBY 1Y or 2Y 1.2 5.6 ns
tPZL 1.8 4.9
tPHZ OEBY 1Y or 2Y 0.9 5.4 ns
tPLZ 1.4 4.5

7.9 Switching Characteristics for Bus Transceiver Function (M Version)

over recommended operating conditions (unless otherwise noted) (see Figure 7 and Figure 8); TA = –55°C to 125°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP MAX UNIT
tPLH 1A or 2A 1B or 2B 4.5 10.8 ns
tPHL 4.2 10.6
tPLH 1A or 2A 1Y or 2Y 6.2 15.7 ns
tPHL 6.1 15.7
tPZH OEAB 1B or 2B 3.6 9.8 ns
tPZL 2.8 8.7
tPHZ OEAB 1B or 2B 3.3 9.7 ns
tPLZ 1.8 5.6
tr Transition time, B port (10%–90%) 4.3 ns
tf Transition time, B port (90%–10%) 4.3 ns
tPLH 1B or 2B 1Y or 2Y 1.6 6.8 ns
tPHL 1.6 6.7
tPZH OEBY 1Y or 2Y 1.2 6.9 ns
tPZL 1.8 6.6
tPHZ OEBY 1Y or 2Y 0.9 6.8 ns
tPLZ 1.4 5.4

7.10 Switching Characteristics for UBT Transceiver (I Version)

over recommended operating conditions (unless otherwise noted) (see Figure 7 and Figure 8); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP MAX UNIT
fmax 120 MHz
tPLH 3A 3B 4.8 9.5 ns
tPHL 4.5 8.3
tPLH LE 3B 5.2 10.6 ns
tPHL 4.7 8.7
tPLH CLKAB 3B 5.4 10.5 ns
tPHL 4.2 8.4
tPZH OE 3B 4.2 9.3 ns
tPZL 2.8 8.5
tPHZ OE 3B 4.2 9.3 ns
tPLZ 2.4 5.7
tr Transition time, B port (10%–90%) 4.3 ns
tf Transition time, B port (90%–10%) 4.3 ns
tPLH 3B 3A 1.5 5.9 ns
tPHL 1.7 5.9
tPLH LE 3A 1.7 5.9 ns
tPHL 1.7 5.9
tPLH CLKBA 3A 1.1 5.5 ns
tPHL 1.4 5.5
tPZH OE 3A 1.5 6.2 ns
tPZL 2.1 5.5
tPHZ OE 3A 0.8 6.2 ns
tPLZ 2.3 5.6

7.11 Switching Characteristics for UBT Transceiver (M Version)

over recommended operating conditions (unless otherwise noted) (see Figure 7 and Figure 8); TA = –55°C to 125°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP MAX UNIT
fmax 120 MHz
tPLH 3A 3B 4.8 11.5 ns
tPHL 4.5 11.8
tPLH LE 3B 5.2 12.9 ns
tPHL 4.7 11.6
tPLH CLKAB 3B 5.4 13.8 ns
tPHL 4.2 11.9
tPZH OE 3B 4.2 11.9 ns
tPZL 2.8 10.7
tPHZ OE 3B 4.2 11.9 ns
tPLZ 2.4 9.1
tr Transition time, B port (10%–90%) 4.3 ns
tf Transition time, B port (90%–10%) 4.3 ns
tPLH 3B 3A 1.5 7.6 ns
tPHL 1.7 7.9
tPLH LE 3A 1.7 7.9 ns
tPHL 1.7 7.9
tPLH CLKBA 3A 1.1 5.7 ns
tPHL 1.4 6.4
tPZH OE 3A 1.5 7.9 ns
tPZL 2.1 7.5
tPHZ OE 3A 0.8 10.5 ns
tPLZ 2.3 6.9

7.12 Switching Characteristics for Bus Transceiver Function (I Version)

driver in slot 11, with receiver cards in all other slots (full load); over recommended operating conditions (unless otherwise noted) (see Figure 6); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP(1) MAX UNIT
tPLH 1A or 2A 1B or 2B 5.9 8.5 ns
tPHL 5.5 8.7
tr(2) Transition time, B port (10%–90%) 9 8.6 11.4 ns
tf(2) Transition time, B port (90%–10%) 8.9 9 10.8 ns
(1) All typical values are at VCC = 3.3 V, TA = 25°C. All values are derived from TI-SPICE models.
(2) All tr and tf times are taken at the first receiver.

7.13 Switching Characteristics for UBT (I Version)

driver in slot 11, with receiver cards in all other slots (full load); over recommended operating conditions (unless otherwise noted) (see Figure 6); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP(1) MAX UNIT
tPLH 3A 3B 6.2 8.9 ns
tPHL 5.6 9
tPLH LE 3B 6.1 9.1 ns
tPHL 5.6 9
tPLH CLKAB 3B 6.2 9.1 ns
tPHL 5.7 9
tr(2) Transition time, B port (10%–90%) 9 8.6 11.4 ns
tf(2) Transition time, B port (90%–10%) 8.9 9 10.8 ns
(1) All typical values are at VCC = 3.3 V, TA = 25°C. All values are derived from TI-SPICE models.
(2) All tr and tf times are taken at the first receiver.

7.14 Switching Characteristics for Bus Transceiver Function (I Version)

driver in slot 1, with one receiver in slot 21 (minimum load); over recommended operating conditions (unless otherwise noted) (see Figure 6); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP(1) MAX UNIT
tPLH 1A or 2A 1B or 2B 5.5 7.4 ns
tPHL 5.3 7.4
tr(2) Transition time, B port (10%–90%) 3.9 3.4 4.4 ns
tf(2) Transition time, B port (90%–10%) 3.7 3.4 4.8 ns
(1) All typical values are at VCC = 3.3 V, TA = 25°C. All values are derived from TI-SPICE models.
(2) All tr and tf times are taken at the first receiver.

7.15 Switching Characteristics for UBT (I Version)

driver in slot 1, with one receiver in slot 21 (minimum load); over recommended operating conditions (unless otherwise noted) (see Figure 6); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP(1) MAX UNIT
tPLH 3A 3B 5.8 7.9 ns
tPHL 5.5 7.7
tPLH LE 3B 5.9 8 ns
tPHL 5.5 7.8
tPLH CLKAB 3B 5.9 8.1 ns
tPHL 5.5 7.7
tr(2) Transition time, B port (10%–90%) 3.9 3.4 4.4 ns
tf(2) Transition time, B port (90%–10%) 3.7 3.4 4.8 ns
(1) All typical values are at VCC = 3.3 V, TA = 25°C. All values are derived from TI-SPICE models.
(2) All tr and tf times are taken at the first receiver.

7.16 Skew Characteristics for Bus Transceiver (I Version)

for specific worst-case VCC and temperature within the recommended ranges of supply voltage and operating free-air temperature (see Figure 7 and Figure 8); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN MAX UNIT
tsk(LH) 1A or 2A 1B or 2B 0.8 ns
tsk(HL) 0.7
tsk(LH) 1B or 2B 1Y or 2Y 0.7 ns
tsk(HL) 0.7
tsk(t)(1) 1A or 2A 1B or 2B 3.9 ns
1B or 2B 1Y or 2Y 1.5
tsk(pp) 1A or 2A 1B or 2B 3.6 ns
1B or 2B 1Y or 2Y 1.4
(1) tsk(t) – Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite directions, both low to high (LH) and high to low (HL) [tsk(t)].

7.17 Skew Characteristics for Bus Transceiver (M Version)

for specific worst-case VCC and temperature within the recommended ranges of supply voltage and operating free-air temperature (see Figure 7 and Figure 8); TA = –55°C to 125°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN MAX UNIT
tsk(LH) 1A or 2A 1B or 2B 1.6 ns
tsk(HL) 1.6
tsk(LH) 1B or 2B 1Y or 2Y 1.6 ns
tsk(HL) 1.6
tsk(t)(1) 1A or 2A 1B or 2B 3.9 ns
1B or 2B 1Y or 2Y 2.5
tsk(pp) 1A or 2A 1B or 2B 3.6 ns
1B or 2B 1Y or 2Y 2.4
(1) tsk(t) – Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite directions, both low to high (LH) and high to low (HL) [tsk(t)].

7.18 Skew Characteristics for UBT (I Version)

for specific worst-case VCC and temperature within the recommended ranges of supply voltage and operating free-air temperature (see Figure 7 and Figure 8); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN MAX UNIT
tsk(LH) 3A 3B 1.4 ns
tsk(HL) 1.1
tsk(LH) CLKAB 3B 0.8 ns
tsk(HL) 0.8
tsk(LH) 3B 3A 0.7 ns
tsk(HL) 0.6
tsk(LH) CLKBA 3A 0.7 ns
tsk(HL) 0.6
tsk(t)(1) 3A 3B 3.9 ns
CLKAB 3B 3.9
3B 3A 1.6
CLKBA 3A 1.2
tsk(pp) 3A 3B 3.6 ns
CLKAB 3B 3.5
3B 3A 1.3
CLKBA 3A 1.2
(1) tsk(t) – Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite directions, both low to high (LH) and high to low (HL) [tsk(t)].

7.19 Skew Characteristics for UBT (M Version)

for specific worst-case VCC and temperature within the recommended ranges of supply voltage and operating free-air temperature (see Figure 7 and Figure 8); TA = –55°C to 125°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN MAX UNIT
tsk(LH) 3A 3B 1.6 ns
tsk(HL) 1.4
tsk(LH) CLKAB 3B 1.3 ns
tsk(HL) 1.3
tsk(LH) 3B 3A 1.2 ns
tsk(HL) 1.2
tsk(LH) CLKBA 3A 1.3 ns
tsk(HL) 1.3
tsk(t)(1) 3A 3B 4.3 ns
CLKAB 3B 3.9
3B 3A 2.9
CLKBA 3A 2.5
tsk(pp) 3A 3B 3.6 ns
CLKAB 3B 3.5
3B 3A 1.3
CLKBA 3A 1.2
(1) tsk(t) – Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite directions, both low to high (LH) and high to low (HL) [tsk(t)].

7.20 Skew Characteristics for Bus Transceiver (I Version)

driver in slot 11, with receiver cards in all other slots (full load); for specific worst-case VCC and temperature within the recommended ranges of supply voltage and operating free-air temperature (see Figure 6); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP(1) MAX UNIT
tsk(LH) 1A or 2A 1B or 2B 2.5 ns
tsk(HL) 3
tsk(t)(2) 1A or 2A 1B or 2B 1 ns
tsk(pp) 1A or 2A 1B or 2B 0.5 3.4 ns
(1) All typical values are at VCC = 3.3 V, TA = 25°C. All values are derived from TI-SPICE models.
(2) tsk(t) – Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite directions, both low to high (LH) and high to low (HL) [tsk(t)].

7.21 Skew Characteristics for UBT (I Version)

driver in slot 11, with receiver cards in all other slots (full load); for specific worst-case VCC and temperature within the recommended ranges of supply voltage and operating free-air temperature (see Figure 6); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP(1) MAX UNIT
tsk(LH) 3A 3B 2.4 ns
tsk(HL) 3.4
tsk(LH) CLKAB 3B 2.7 ns
tsk(HL) 3.4
tsk(t)(2) 3A 3B 1 ns
CLKAB 3B 1
tsk(pp) 3A 3B 0.5 3.4 ns
CLKAB 3B 0.6 3.5
(1) All typical values are at VCC = 3.3 V, TA = 25°C. All values are derived from TI-SPICE models.
(2) tsk(t) – Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite directions, both low to high (LH) and high to low (HL) [tsk(t)].

7.22 Skew Characteristics for Bus Transceiver (I Version)

driver in slot 1, with one receiver in slot 21 (minimum load); for specific worst-case VCC and temperature within the recommended ranges of supply voltage and operating free-air temperature (see Figure 6); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP(1) MAX UNIT
tsk(LH) 1A or 2A 1B or 2B 1.7 ns
tsk(HL) 2.1
tsk(t)(2) 1A or 2A 1B or 2B 1 ns
tsk(pp) 1A or 2A 1B or 2B 0.2 2.1 ns
(1) All typical values are at VCC = 3.3 V, TA = 25°C. All values are derived from TI-SPICE models.
(2) tsk(t) – Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite directions, both low to high (LH) and high to low (HL) [tsk(t)].

7.23 Skew Characteristics for UBT (I Version)

driver in slot 1, with one receiver in slot 21 (minimum load); for specific worst-case VCC and temperature within the recommended ranges of supply voltage and operating free-air temperature (see Figure 6); TA = –40°C to 85°C
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 MIN TYP(1) MAX UNIT
tsk(LH) 3A 3B 2 ns
tsk(HL) 2.3
tsk(LH) CLKAB 3B 2.1 ns
tsk(HL) 2.4
tsk(t)(2) 3A 3B 1 ns
CLKAB 3B 1
tsk(pp) 3A 3B 0.2 2.5 ns
CLKAB 3B 0.2 2.9
(1) All typical values are at VCC = 3.3 V, TA = 25°C. All values are derived from TI-SPICE models.
(2) tsk(t) – Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite directions, both low to high (LH) and high to low (HL) [tsk(t)].

7.24 Maximum Data Transfer Rates

DATE TOPOLOGY PROTOCOL DATA (BITS PER CYCLE) DATA TRANSFERS PER CLOCK CYCLE PER SYSTEM
(MBps)		 FREQUENCY (MHz)
BACKPLANE CLOCK
1981 VMEbus IEEE-1014 BLT 32 1 40 10 10
1989 VME64 MBLT 64 1 80 10 10
1995 VME64x 2eVME 64 2 160 10 20
1997 VME64x 2eSST 64 2-No Ack 160 to 320 10 to 20 20 to 40
1999 VME320 2eSST 64 2-No Ack 320 to 1000 20 to 62.5 40 to 125
SN74VMEH22501A-EP D001_SCES625.gif
1. See data sheet for absolute maximum and minimum recommended operating conditions.
2. Silicon operating life design goal is 10 years at 105°C junction temperature (does not include package interconnect life).
3. Enhanced plastic product disclaimer applies.
Figure 1. SN74VMEH22501A-EP Derating Chart

7.25 Typical Characteristics

SN74VMEH22501A-EP g_icc_ab_ces357.gif Figure 2. Supply Current vs Frequency A to B
SN74VMEH22501A-EP g_vol_v_iol_ces357.gif Figure 4. High-Level Output Voltage vs High-Level Output Current, VOL vs IOL
SN74VMEH22501A-EP g_icc_ba_ces357.gif Figure 3. Supply Current vs Frequency B to A
SN74VMEH22501A-EP g_voh_v_ioh_ces357.gif Figure 5. Low-Level Output Voltage vs Low-Level Output Current, VOH vs IOH