SCES469F August   2003  – March 2020 SN74LVC1404

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Simplified Schematic
  5. Revision History
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Switching Characteristics, CL = 15 pF
    7. 7.7 Switching Characteristics, CL = 30 pF or 50 pF
    8. 7.8 Operating Characteristics
    9. 7.9 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Testing
      3. 10.2.3 Application Curves
        1. 10.2.3.1 LVC1404 in 25-MHz Crystal-Oscillator Circuit
        2. 10.2.3.2 LVC1404 in 10-MHz Crystal-Oscillator Circuit
        3. 10.2.3.3 LVC1404 in 2-MHz Crystal-Oscillator Circuit
        4. 10.2.3.4 LVC1404 in 100-kHz Crystal-Oscillator Circuit
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • DCU|8
  • YZP|8
  • DCT|8
散热焊盘机械数据 (封装 | 引脚)
订购信息

Overview

The SN74LVC1404 device consists of one inverter with a Schmitt-trigger input and two unbuffered inverters. It is designed for 1.65-V to 5.5-V VCC operation.

XIN and XOUT pins can be connected to a crystal or resonator in oscillator applications. The SN74LVC1404 device provides an additional unbuffered inverter (OSCOUT) and a Schmitt-trigger input inverter for signal conditioning (see the Functional Block Diagram). The control (CTRL) input disables the oscillator circuit to reduce power consumption. The oscillator circuit is disabled and the XOUT output is set to low level when CTRL is low. To ensure the oscillator circuit remains disabled during power up or power down, CTRL should be connected to GND through a pulldown resistor. The minimum value of the resistor is determined by the current-sourcing capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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