SCAS339S March 1994 – February 2017 SN74LVC126A
The SN74LVC126A device is a quadruple bus buffer gate designed for 1.65-V to 3.6-V VCC operation.
The SN74LVC126A device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE must be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V and 5-V system environment.
|PART NUMBER||PACKAGE||BODY SIZE (NOM)|
|SN74LVC126A-DR||SOIC (14)||8.65 mm × 3.91 mm|
|SN74LVC126A-DBR||SSOP (14)||6.20 mm × 5.30 mm|
|SN74LVC126A-DGVR||TVSOP (14)||3.60 mm × 4.40 mm|
|SN74LVC126A-NSR||SOP (14)||10.20 mm × 5.30 mm|
|SN74LVC126A-PWR||TSSOP (14)||5.00 mm × 4.40 mm|
|SN74LVC126A-RGYR||VQFN (14)||3.50 mm × 3.50 mm|