ZHCSBY5D December   2013  – March 2024 SN74LV1T125

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Related Products
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Operating Characteristics
    8. 6.8 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Clamp Diode Structure
      2. 8.3.2 Balanced CMOS Push-Pull Outputs
      3. 8.3.3 LVxT Enhanced Input Voltage
        1. 8.3.3.1 Down Translation
        2. 8.3.3.2 Up Translation
    4. 8.4 Device Functional Modes
  10. 应用信息免责声明
    1. 9.1 Layout
      1. 9.1.1 Layout Guidelines
    2. 9.2 Power Supply Recommendations
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support (Analog)
      1. 10.1.1 Related Documentation
    2. 10.2 接收文档更新通知
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 静电放电警告
    6. 10.6 术语表
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

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Device Functional Modes

Function Tables
INPUT (1)
(LOWER LEVEL INPUT)
OUTPUT (2)
(VCC CMOS)
OE(3)AY
LHH
LLL
HXZ
H = High Voltage Level, L = Low Voltage Level, X = Do not Care, Z = High Impedance
H = Driving High, L = Driving Low, Z = High Impedance State
Not recommend to float OE pin for signal oscillation.
SUPPLY VCC = 3.3 V
INPUT
(LOWER LEVEL INPUT)
OUTPUT
(VCC CMOS)
ABY
 VIH(min) = 1.35 V
VIL(max) = 0.8 V
 VOH(min) = 2.9 V
VOL(max) = 0.2 V