请参考 PDF 数据表获取器件具体的封装图。
本资源的原文使用英文撰写。 为方便起见,TI 提供了译文;由于翻译过程中可能使用了自动化工具,TI 不保证译文的准确性。 为确认准确性,请务必访问 ti.com 参考最新的英文版本(控制文档)。
REF35 是毫微功耗、低漂移、高精度串联基准系列器件。REF35 系列具有 ±0.05% 的初始精度,典型功耗为 650nA。该器件的温度系数 (12ppm/°C) 和长期稳定性(1000 小时内为 40ppm)有助于提高系统稳定性和可靠性。凭借低功耗以及高精度规格,此器件适用于多种便携式应用和低电流应用。
REF35 可提供高达 10mA 电流,噪声为 3.3ppmp-p,负载调整率为 20ppm/mA。借助这一功能集,REF35 可为精密传感器和 12 至 16 位数据转换器提供强大的低噪声高精度电源。
此系列的额定工作温度范围为 -40°C 至 105°C,并且在 -55°C 至 125°C 也可以正常运行。凭借宽温度范围,此系列适用于工业应用。
REF35 提供 1.024V 至 5.0V 的宽输出电压范围。该器件具有节省空间的 6 引脚 SOT-23 和 4 引脚 WCSP 封装选项。有关可用的电压和封装选项,请联系您当地的 TI 销售代表。
PRODUCT | VREF | |
---|---|---|
SOT-23 (6) | WCSP (4) | |
REF35102QDBVR | REF35102YBHR | 1.024V |
REF35120QDBVR | REF35120YBHR | 1.2V |
REF35125QDBVR | REF35125YBHR | 1.25V |
REF35160QDBVR | REF35160YBHR | 1.6V |
REF35170QDBVR | - | 1.7V |
REF35180QDBVR | REF35180YBHR | 1.8V |
REF35205QDBVR | - | 2.048V |
REF35250QDBVR | REF35250YBHR | 2.5V |
REF35300QDBVR | REF35300YBHR | 3.0V |
REF35330QDBVR | - | 3.3V |
REF35360QDBVR | - | 3.6V |
REF35409QDBVR | REF35409YBHR | 4.096V |
REF35500QDBVR | - | 5.0V |
PIN | TYPE | DESCRIPTION | ||
---|---|---|---|---|
NAME | SOT-23 | WCSP | ||
GND | 1 | B1 | Ground | Device ground connection. For DBV package pin 1 and pin 2 are internally short. |
GND | 2 | - | Ground | Device ground connection. |
EN | 3 | B2 | Input | Enable connection. Enables or disables the device. |
VIN | 4 | A2 | Power | Input supply voltage connection. |
NR | 5 | - | Output | Noise reduction pin. Connect a capacitor to reduce noise. This pin can be left floating. |
VREF | 6 | A1 | Output | Reference voltage output. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Input voltage | IN | –0.3 | 6.5 | V |
Enable voltage | EN | –0.3 | IN + 0.3 (2) | V |
Output voltage | VREF | –0.3 | IN + 0.3 (2) | V |
Output short circuit current | ISC | 20 | mA | |
Operating temperature range | TA | –55 | 125 | °C |
Storage temperature range | Tstg | –65 | 170 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) | ±2000 | V |
Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002, all pins (2) | ±750 |
THERMAL METRIC(1) | REF35 | UNIT | ||
---|---|---|---|---|
YBH (WCSP) | DBV (SOT-23) | |||
4 PINS | 6 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 178.9 | 164.4 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 1.1 | 102.5 | °C/W |
RθJB | Junction-to-board thermal resistance | 60.3 | 59.6 | °C/W |
ΨJT | Junction-to-top characterization parameter | 0.5 | 44.0 | °C/W |
ΨJB | Junction-to-board characterization parameter | 60.2 | 59.4 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | °C/W |
PARAMETER | TEST CONDITION | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
ACCURACY AND DRIFT | |||||||
Output voltage accuracy | TA = 25℃ | –0.05 | 0.05 | % | |||
Output voltage temperature coefficient | –40℃ ≤ TA ≤ 105℃ | 12 | ppm/℃ | ||||
LINE AND LOAD REGULATION | |||||||
ΔVREF/ΔVIN | Line regulation | VREF < 2.5V; VIN = VREF + VDO to VINMAX; –40℃ ≤ TA ≤ 105℃ | 40 | 160 | ppm/V | ||
VREF ≥ 2.5V; VIN = VREF + VDO to VINMAX; –40℃ ≤ TA ≤ 105℃ | 40 | 120 | ppm/V | ||||
ΔVREF/ΔIL | Load regulation | IL = 0mA to 10mA, VIN = VREF + VDO |
Source | 20 | 60 | ppm/mA | |
IL = 0mA to 5mA, VIN = VREF + VDO |
Sink | 40 | 350 | ppm/mA | |||
POWER SUPPLY | |||||||
VIN | Input voltage (1) | VREF + VDO | 6 | V | |||
IQ | Quiescent current | Active mode | TA = 25℃ | 0.65 | 0.9 | µA | |
–40℃ ≤ TA ≤ 85℃ | 1.3 | ||||||
–40℃ ≤ TA ≤ 125℃ | 2.6 | ||||||
Shutdown mode | TA = 25℃ | 0.1 | |||||
–40℃ ≤ TA ≤ 125℃ | 0.5 | ||||||
VEN | Enable pin voltage | Active mode (EN = 1 or Float) | 0.7 x VIN | V | |||
Shutdown mode (EN = 0) | 0.3 x VIN | ||||||
IEN | Enable pin current | VEN = VIN | 0.05 | 0.1 | uA | ||
VDO | Dropout voltage | IL = 5mA | 120 | mV | |||
IL = 10mA | 250 | ||||||
ISC | Short circuit current, Sourcing | VREF = 0V, TA = 25℃ | 33 | mA | |||
ISC | Short circuit current, Sinking | VREF = VIN V, TA = 25℃ | 21 | mA | |||
TURN-ON TIME | |||||||
tON | Turn-on time (2) | 0.1% settling, CL = 1µF, VREF = 2.5V | 2 | ms | |||
NOISE | |||||||
en | Output voltage noise | ƒ = 10Hz to 1kHz, CL = 1µF | 0.7 | ppmrms | |||
enp-p | Low-frequency noise | ƒ = 0.1Hz to 10Hz, VREF ≥ 2.5V | 3.8 | ppmp-p | |||
ƒ = 0.1Hz to 10Hz, VREF < 2.5V | 3.3 | ppmp-p | |||||
HYSTERESIS AND LONG-TERM STABILITY | |||||||
Long-term stability | 0 to 1000h at 35°C | 40 | ppm | ||||
Output voltage hysteresis | 25°C, –40°C, 105°C, 25°C (cycle 1) | 70 | ppm | ||||
Output voltage hysteresis | 25°C, –40°C, 105°C, 25°C (cycle 2) | 20 | ppm | ||||
Output voltage hysteresis | 25°C, –40°C, 85°C, 25°C (cycle 1) | 50 | ppm | ||||
Output voltage hysteresis | 25°C, –40°C, 85°C, 25°C (cycle 2) | 13 | ppm | ||||
STABLE CAPACITANCE RANGE | |||||||
Input capacitor range | 0.1 | µF | |||||
Output capacitor range (3) | 0.1 | 10 | µF |
PARAMETER | TEST CONDITION | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
ACCURACY AND DRIFT | |||||||
Output voltage accuracy | TA = 25℃ | –0.05 | 0.05 | % | |||
Output voltage temperature coefficient | –40℃ ≤ TA ≤ 85℃ | 10 | ppm/℃ | ||||
LINE AND LOAD REGULATION | |||||||
ΔVREF/ΔVIN | Line regulation | VREF < 2.5V; VIN = VREF + VDO to VINMAX | 40 | 160 | ppm/V | ||
VREF ≥ 2.5V; VIN = VREF + VDO to VINMAX | 40 | 80 | ppm/V | ||||
ΔVREF/ΔIL | Load regulation | IL = 0mA to 10mA, VIN = VREF + VDO |
Source | 20 | 60 | ppm/mA | |
IL = 0mA to 5mA, VIN = VREF + VDO |
Sink | 40 | 350 | ppm/mA | |||
POWER SUPPLY | |||||||
VIN | Input voltage (1) | VREF + VDO | 6 | V | |||
IQ | Quiescent current | Active mode | TA = 25℃ | 0.65 | 0.9 | µA | |
–40℃ ≤ TA ≤ 85℃ | 1.3 | ||||||
–40℃ ≤ TA ≤ 125℃ | 2.6 | ||||||
Shutdown mode | TA = 25℃ | 0.1 | |||||
–40℃ ≤ TA ≤ 125℃ | 0.5 | ||||||
VEN | Enable pin voltage | Active mode (EN = 1 or Float) | 0.7 x VIN | V | |||
Shutdown mode (EN = 0) | 0.3 x VIN | ||||||
IEN | Enable pin current | VEN = VIN | 0.05 | 0.1 | uA | ||
VDO | Dropout voltage | IL = 5mA | 120 | mV | |||
IL = 10mA | 250 | ||||||
ISC | Short circuit current, Sourcing | VREF = 0V, TA = 25℃ | 30 | mA | |||
ISC | Short circuit current, Sinking | VREF = VIN V, TA = 25℃ | 20 | mA | |||
TURNON TIME | |||||||
tON | Turn-on time (2) | 0.1% settling, CREF = 1µF, VREF = 2.048V | 2 | ms | |||
NOISE | |||||||
en | Output voltage noise | ƒ = 10Hz to 1kHz | 0.7 | ppmrms | |||
enp-p | Low frequency noise | ƒ = 0.1Hz to 10Hz, VREF ≥ 2.5V | 3.8 | ppmp-p | |||
ƒ = 0.1Hz to 10Hz, VREF < 2.5V | 3.3 | ppmp-p | |||||
HYSTERESIS AND LONG-TERM STABILITY | |||||||
Long-term stability | 0 to 1000h at 35°C | 40 | ppm | ||||
Output voltage hysteresis | 25°C, –40°C, 125°C, 25°C (cycle 1) | 70 | ppm | ||||
STABLE CAPACITANCE RANGE | |||||||
Input capacitor range | 0.1 | µF | |||||
Output capacitor range (3) | 0.1 | 10 | µF |
at TA = 25°C, VIN = VEN = VREF + 0.3V, IL = 0mA, CL = 10µF, CIN = 0.1µF (unless otherwise noted)
The materials used in the manufacture of the REF35 have differing coefficients of thermal expansion, resulting in stress on the device die when the part is heated. Mechanical and thermal stress on the device die can cause the output voltages to shift, degrading the initial accuracy specifications of the product. Reflow soldering is a common cause of this error.
To illustrate this effect, a total of 32 devices
were soldered on one printed circuit board using lead-free solder paste and the paste
manufacturer suggested reflow profile. Figure 7-1 shows the reflow profile. The printed circuit board is comprised of FR4 material. The
board thickness is 1.66mm and the area is
174mm × 135mm.
The reference output voltage is measured before and after the reflow process; Figure 7-2 shows the typical shift. Although all tested units exhibit very low shifts (< 0.03%), higher shifts are also possible depending on the size, thickness, and material of the printed circuit board (PCB). An important note is that the histograms display the typical shift for exposure to a single reflow profile. Exposure to multiple reflows, as is common on PCBs with surface-mount components on both sides, causes additional shifts in the output bias voltage. If the PCB is exposed to multiple reflows, the device must be soldered in the last pass to minimize its exposure to thermal stress.
The REF35 is designed and tested for a low output voltage temperature coefficient. The temperature coefficient is defined as the change in output voltage over temperature. The temperature coefficient is calculated using the box method in which a box is formed by the minimum/maximum values for the nominal output voltage over the operating temperature range. REF35 has a low maximum temperature coefficient of 12ppm/°C from –40°C to +105°C. The box method specifies limits for the temperature error but does not specify the exact shape and slope of the device under test. Due to temperature curvature correction to achieve low-temperature drift, the temperature drift is expected to be non-linear. See TI's Analog Design Journal, Precision voltage references, for more information on the box method. Use Equation 1 for the box method.
Figure 7-3 shows a typical voltage versus temperature curves for various reference voltages in SOT23 package. Figure 7-4 shows the distribution of temperature coefficients for REF35250 devices in SOT23 package.
One of the key performance parameters of the REF35 references is long-term stability also known as long-term drift. The long-term stability value is tested in a setup that reflects standard PCB board manufacturing practices. The boards are made of standard FR4 material and the board does not have special cuts or grooves around the devices to relieve the mechanical stress of the PCB. The devices and boards in this test do not undergo high temperature burn in post-soldering prior to testing. These conditions reflect a real world use case scenario and common manufacturing techniques.
During the long-term stability testing, precautions are taken to make sure that only the long-term stability drift is measured. The boards are maintained at 35°C in an oil bath. The oil bath makes sure that the temperature is constant across the device over time compared to an air oven. The measurements are captured every 30 minutes with a calibrated 8.5 digit multimeter.
The typical long-term stability characteristic is expressed as a deviation of the reference voltage output over time.
Figure 7-5 shows that the typical drift value for the REF35 6-pin SOT-23 package is 40ppm from 0 to 1000 hours and 55ppm from 0 to 2000 hours. It is important to understand that long-term stability is not ensured by design and that the value is typical. The REF35 will experience the highest drift in the initial 1000 hr. Subsequent deviation is typically lower than first 1000 hr.
Thermal hysteresis is measured with the REF35 soldered to a PCB, similar to a real-world application. Thermal hysteresis for the device is defined as the change in output voltage after operating the device at 25°C, cycling the device through the specified temperature range, and returning to 25°C. The PCB was baked at 150°C for 30 minutes before thermal hysteresis was measured. Use Equation 2 to calculate the thermal hysteresis:
where
The graphs below show the typical thermal hysteresis distribution across various temperature ranges in two cycles.
The reference pin output noise is categorized as low frequency and broadband noise. The following sections describe these categories in detail.
Flicker noise, also known as 1/f noise, is a low-frequency noise that affects the device output voltage which can affect precision measurements in ADCs. This noise increases proportionally with output voltage and operating temperature. Noise is measured by filtering the output from 0.1Hz to 10Hz. The 1/f noise is an extremely low value, therefore the frequency of interest must be amplified and band-pass filtered. This is done by using a high-pass filter to block the DC voltage. The resulting noise is then amplified by a gain of 1000. The bandpass filter is created by a series of high-pass and low-pass filter that adds additional gain to make it more visible on a oscilloscope as shown in Figure 7-11. Figure 7-12 shows the effect of flicker noise over 10 second for REF35250. Flicker noise must be tested in a Faraday cage enclosure to block environmental noise.
Figure 7-13 shows the typical 1/f noise (0.1Hz to 10Hz) distribution across various load conditions. REF35 device also offers noise reduction functionality by adding an optional capacitor between NR (pin 5) and ground pins.
Figure 7-14 shows the typical 1/f noise (0.1Hz to 10Hz) distribution across REF35 devices with various capacitance between NR pin and GND.Broadband noise is a noise that appears at higher frequency compared to 1/f noise. The broadband noise is measured by high-pass filtering the output of the reference device, followed by a gain stage and measuring the result on a spectrum analyzer as shown in Figure 7-15.
For noise sensitive designs, a low-pass filter can be used to reduce broadband output noise. When designing a low-pass filter, take special care to make sure the output impedance of the filter does not degrade AC performance. This can occur in RC low-pass filters where a large series resistance can impact the load transients due to output current fluctuations. The REF35 device also offers noise reduction functionality by adding an optional capacitor between NR (pin 5) and ground pins. Figure 7-16 and Figure 7-17 show the noise spectrum for REF35250 and REF35500 devices respectively across various load capacitance.