ZHCSM22 October   2020 OPA856

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
    7. 7.7 Typical Characteristics (continued)
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input and ESD Protection
      2. 8.3.2 Feedback Pin
      3. 8.3.3 Wide Gain-Bandwidth Product
      4. 8.3.4 Slew Rate and Output Stage
    4. 8.4 Device Functional Modes
      1. 8.4.1 Split-Supply and Single-Supply Operation
      2. 8.4.2 Power-Down Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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Wide Gain-Bandwidth Product

Figure 7-7 shows the open-loop magnitude and phase response of the OPA856. Calculate the gain bandwidth product of any op amp by determining the frequency at which the AOL is 40 dB and multiplying that frequency by a factor of 100. The open-loop response shows the OPA856 to have approximately 57° of phase-margin when configured as a unity-gain buffer.

Figure 8-5 shows the open-loop magnitude (AOL) of the OPA856 as a function of temperature. The results show minimal variation over the entire temperature range. Semiconductor process variation is the naturally occurring variation in the attributes of a transistor (Early-voltage, β, channel-length, and width) and other passive elements (resistors and capacitors) when fabricated into an integrated circuit. The process variation can occur across devices on a single wafer or across devices over multiple wafer lots over time. Typically the variation across a single wafer is tightly controlled. Figure 8-6 shows the AOL magnitude of the OPA856 as a function of process variation over time. The results show the AOL curve for the nominal process corner and the variation one standard deviation from the nominal. The simulated results show less than 5° of phase-margin difference within a standard deviation of process variation when the amplifier is configured as a unity-gain bufffer.

GUID-20200908-CA0I-BDF0-WR7Z-DMCJSSSCFS0J-low.gifFigure 8-5 Open-Loop Gain vs Temperature
GUID-20200908-CA0I-D5VS-TKDB-SK7WX0RPSQKF-low.gifFigure 8-6 Open-Loop Gain vs Process Variation