ZHCS228A June   2011  – February 2024 OPA564-Q1

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Adjustable Current Limit
        1. 7.3.1.1 Setting the Current Limit
      2. 7.3.2 Enable and Shutdown (E/S) Pin
      3. 7.3.3 Input Protection
      4. 7.3.4 Output Shutdown
      5. 7.3.5 Microcontroller Compatibility
      6. 7.3.6 Current Limit Flag
      7. 7.3.7 Thermal Protection
      8. 7.3.8 Junction Temperature Measurement Using TSENSE
    4. 7.4 Device Functional Modes
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Configuration
      2. 8.1.2 Output-Stage Compensation
      3. 8.1.3 Output Protection
      4. 8.1.4 Power Dissipation and Safe Operating Area
    2. 8.2 Typical Applications
      1. 8.2.1 Improved Howland Current Pump
      2. 8.2.2 Programmable Power Supply
      3. 8.2.3 Powerline Communication
      4. 8.2.4 Motor-Drive Circuit
      5. 8.2.5 DC Motor-Speed Controller (Without Tachometer)
      6. 8.2.6 Generating VDIG
      7. 8.2.7 Temperature Measurement
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermally Enhanced PowerPAD™ Integrated Circuit Package
          1. 8.4.1.1.1 Bottom-Side Thermal Pad Assembly Process
  10. Device and Documentation Support
    1. 9.1 接收文档更新通知
    2. 9.2 支持资源
    3. 9.3 Trademarks
    4. 9.4 静电放电警告
    5. 9.5 术语表
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Thermally Enhanced PowerPAD™ Integrated Circuit Package

The OPA564-Q1 uses the HSOIC-20 PowerPAD integrated circuit package (DWP), a thermally-enhanced, standard size integrated-circuit (IC) package. This package enhances power dissipation capability significantly. This package is easily mounted using standard printed circuit board (PCB) assembly techniques, and can be removed and replaced using standard repair procedures.

Figure 8-15 shows how DWP package is designed so that the leadframe die pad (or thermal pad) is exposed on the bottom of the IC. The thermal pad provides an extremely low thermal resistance (θJC) path between the die and the exterior of the package.

GUID-20231119-SS0I-NN8W-W8WF-BQKSRRXLFKBW-low.svg Figure 8-15 Cross-Section Views

The PowerPAD integrated circuit package with exposed pad down are designed to be soldered directly to the PCB, using the PCB as a heat sink. Texas Instruments does not recommend the use of the PowerPAD integrated circuit package without soldering the package to the PCB because of the risk of lower thermal performance and mechanical integrity. In addition, through the use of thermal vias, the bottom-side thermal pad can be directly connected to a power plane or special heat-sink structure designed into the PCB. Ensure that the thermal pad is at the same voltage potential as V–. Always solder the bottom-side thermal pad to the PCB, even with applications that have low power dissipation. The solder provides the necessary thermal and mechanical connection between the leadframe die and the PCB.