SBOS058A December   1997  – October 2015 OPA134 , OPA2134 , OPA4134

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Total Harmonic Distortion
      2. 7.3.2 Distortion Measurements
      3. 7.3.3 Source Impedance and Distortion
      4. 7.3.4 Phase Reversal Protection
      5. 7.3.5 Output Current Limit
    4. 7.4 Device Functional Modes
      1. 7.4.1 Noise Performance
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Operating Voltage
      2. 8.1.2 Offset Voltage Trim
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 WEBENCH Filter Designer Tool
        2. 11.1.1.2 TINA-TI (Free Software Download)
        3. 11.1.1.3 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Supply voltage, V+ to V– 36 V
Input voltage (V–) –0.7 (V+) +0.7 V
Output short circuit(2) Continuous
Operating temperature –40 125 °C
Junction temperature 150 °C
Lead temperature (soldering, 10 s) 300 °C
Tstg Storage temperature –55 125 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Short-circuit to ground, one amplifier per package.

6.2 ESD Ratings

VALUE UNIT
OPA134 in PDIP and SOIC Package, OPA2134 and OPA4134 in PDIP Package
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
OPA2134 in SOIC Package
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
OPA4134 in SOIC Package
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VS Supply voltage, VS = (V+) – (V–) ±2.5 ±15 ±18 V
TA Specified temperature –40 85 °C

6.4 Electrical Characteristics

At TA = +25°C, VS = ±15 V, unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AUDIO PERFORMANCE
Total Harmonic Distortion + Noise G = 1, f = 1 kHz, VO = 3 Vrms RL = 2 kΩ 0.00008%
RL = 600 Ω 0.00015%
Intermodulation Distortion G = 1, f = 1 kHz, VO = 1 Vp-p –98 dB
Headroom(1) THD < 0.01%, RL = 2 kΩ , VS = 18 V 23.6 dBu
FREQUENCY RESPONSE
Gain-Bandwidth Product 8 MHz
Slew Rate(2) ±15 ±20 V/µs
Full Power Bandwidth 1.3 MHz
Settling Time 0.1% G = 1, 10-V Step, CL = 100 pF 0.7 µs
Settling Time 0.01% G = 1, 10-V Step, CL = 100 pF 1 µs
Overload Recovery Time (VIN) × (Gain) = VS 0.5 µs
NOISE
Input Voltage Noise Noise Voltage,
f = 20 Hz to 20 kHz 		1.2 µVrms
Noise Density,
f = 1 kHz 		8 nV/√Hz
Current Noise Density, f = 1 kHz 3 fA/√Hz
OFFSET VOLTAGE
Input Offset Voltage ±0.5 ±2 mV
TA = –40°C to 85°C ±1 ±3(3)
Input Offset Voltage vs Temperature TA = –40°C to 85°C ±2 µV/°C
Input Offset Voltage vs Power Supply (PSRR) VS = ±2.5 V to ±18 V 90 106 dB
Channel Seperation (Dual, Quad) DC, RL = 2 kΩ 135 dB
f = 20 kHz, RL = 2 kΩ 130
INPUT BIAS CURRENT
Input Bias Current(4) VCM = 0 V 5 ±100 pA
Input Bias Current vs Temperature(3) See Typical Characteristics ±5 nA
Input Offset Current(4) VCM = 0 V ±2 ±50 pA
INPUT VOLTAGE RANGE
Common-Mode Voltage Range (V–)+2.5 13 (V+)–2.5 V
Common-Mode Rejection VCM = –12.5 V to 12.5 V 86 100 dB
TA = –40°C to 85°C 90
INPUT IMPEDANCE
Differential 1013 || 2 Ω || pF
Common-Mode VCM = –12.5 V to 12.5 V 1013 || 5 Ω || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain RL = 10 kΩ , VO = –14.5 V to 13.8 V 104 120 dB
RL = 2 kΩ , VO = –13.8 V to 13.5 V 104 120
RL = 600 Ω , VO = –12.8 V to 12.5 V 104 120
OUTPUT
Voltage Output RL = 10 kΩ (V–)+0.5 (V+)–1.2 V
RL = 2 kΩ (V–)+1.2 (V+)–1.5
RL = 600 Ω (V–)+2.2 (V+)–2.5
Output Current ±35 mA
Output Impedance, Closed-Loop(5) f = 10 kHz 0.01 Ω
Output Impedance, Open-Loop f = 10 kHz 10 Ω
Short-Circuit Current ±40 mA
Capacitive Lead Drive (Stable Operation) See Typical Characteristics
POWER SUPPLY
Specified Operating Voltage ±15 V
Operating Voltage Range ±2.5 ±18 V
Quiescent Current (per amplifier) IO = 0 4 5 mA
TEMPERATURE RANGE
Specified Range –40 85 °C
Operating Range –55 125 °C
(1) dBu = 20*log (Vrms/0.7746) where Vrms is the maximum output voltage for which THD+Noise is less than 0.01%. See THD+Noise text.
(2) Proposed by design.
(3) Proposed by wafer-level test to 95% confidence level.
(4) High-speed test at TJ = 25°C.
(5) See Figure 14

6.5 Typical Characteristics

At TA = 25°C, VS = 15 V, RL = 2 kΩ, unless otherwise noted.
OPA134 OPA2134 OPA4134 sbos058_typchar1.gif
Figure 1. Total Harmonic Distortion + Noise vs Frequency
OPA134 OPA2134 OPA4134 sbos058_typchar3.gif
Figure 3. Total Harmonic Distortion + Noise vs Frequency
OPA134 OPA2134 OPA4134 sbos058_typchar5.gif
Figure 5. Harmonic Distortion + Noise vs Frequency
OPA134 OPA2134 OPA4134 sbos058_typchar7.gif
Figure 7. Input Voltage and Current Noise Spectral Density vs Frequency
OPA134 OPA2134 OPA4134 sbos058_typchar9.gif
Figure 9. Open-Loop Gain and Phase vs Frequency
OPA134 OPA2134 OPA4134 sbos058_typchar11.gif
Figure 11. Power Supply and Common-Mode Rejection vs Frequency
OPA134 OPA2134 OPA4134 sbos058_typchar13.gif
Figure 13. Maximum Output Voltage vs Frequency
OPA134 OPA2134 OPA4134 sbos058_typchar15.gif
Figure 15. Input Bias Current vs Temperature
OPA134 OPA2134 OPA4134 sbos058_typchar17.gif
Figure 17. Open-Loop Gain vs Temperature
OPA134 OPA2134 OPA4134 sbos058_typchar19.gif
Figure 19. Quiescent Current and Short-Circuit Current vs Temperature
OPA134 OPA2134 OPA4134 sbos058_typchar21.gif
Figure 21. Offset Voltage Production Distribution
OPA134 OPA2134 OPA4134 sbos058_typchar23.gif
Figure 23. Small-Signal Step Response G = 1, CL = 100 pF
OPA134 OPA2134 OPA4134 sbos058_typchar25.gif
Figure 25. Settling Time vs Closed-Loop Gain
OPA134 OPA2134 OPA4134 sbos058_typchar2.gif
Figure 2. SMPTE Intermodulation Distortion vs Output Amplitude
OPA134 OPA2134 OPA4134 sbos058_typchar4.gif
Figure 4. Headroom – Total Harmonic Distortion + Noise vs Output Amplitude
OPA134 OPA2134 OPA4134 sbos058_typchar6.gif
Figure 6. Voltage Noise vs Source Resistance
OPA134 OPA2134 OPA4134 sbos058_typchar8.gif
Figure 8. Input-Referred Noise Voltage vs Noise Bandwidth
OPA134 OPA2134 OPA4134 sbos058_typchar10.gif
Figure 10. Closed-Loop Gain vs Frequency
OPA134 OPA2134 OPA4134 sbos058_typchar12.gif
Figure 12. Channel Separation vs Frequency
OPA134 OPA2134 OPA4134 sbos058_typchar14.gif
Figure 14. Closed-Loop Output Impedance vs Frequency
OPA134 OPA2134 OPA4134 sbos058_typchar16.gif
Figure 16. Input Bias Current vs Input Common-Mode Voltage
OPA134 OPA2134 OPA4134 sbos058_typchar18.gif
Figure 18. CMR, PSR vs Temperature
OPA134 OPA2134 OPA4134 sbos058_typchar20.gif
Figure 20. Output Voltage Swing vs Output Current
OPA134 OPA2134 OPA4134 sbos058_typchar22.gif
Figure 22. Offset Voltage Drift Production Distribution
OPA134 OPA2134 OPA4134 sbos058_typchar24.gif
Figure 24. Large-Signal Step Response G = 1, CL = 100 pF
OPA134 OPA2134 OPA4134 sbos058_typchar26.gif
Figure 26. Small-Signal Overshoot vs Load Capacitance