ZHCSUD7B May 1998 – May 2024 OPA130 , OPA2130 , OPA4130
PRODUCTION DATA
Figure 4-1 OPA130 D Package, 8-Pin SOIC
(Top View)| PIN | TYPE | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| +IN | 3 | Input | Noninverting input, channel A |
| –IN | 2 | Input | Inverting input, channel A |
| NC | 1, 5 | — | Do not connect these pins(1) |
| NC | 8 | — | No internal connection. Float this pin. |
| OUT | 6 | Output | Output |
| V+ | 7 | Power | Positive (highest) power supply |
| V– | 4 | Power | Negative (lowest) power supply |
Figure 4-2 OPA2130 D Package, 8-Pin SOIC
(Top View)| PIN | TYPE | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| +IN A | 3 | Input | Noninverting input, channel A |
| +IN B | 5 | Input | Noninverting input, channel B |
| –IN A | 2 | Input | Inverting input, channel A |
| –IN B | 6 | Input | Inverting input, channel B |
| OUT A | 1 | Output | Output, channel A |
| OUT B | 7 | Output | Output, channel B |
| V+ | 8 | Power | Positive (highest) power supply |
| V– | 4 | Power | Negative (lowest) power supply |
Figure 4-3 OPA4130 D Package, 14-Pin SOIC
(Top View)| PIN | TYPE | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| +IN A | 3 | Input | Noninverting input, channel A |
| +IN B | 5 | Input | Noninverting input, channel B |
| +IN C | 10 | Input | Noninverting input, channel C |
| +IN D | 12 | Input | Noninverting input, channel D |
| –IN A | 2 | Input | Inverting input, channel A |
| –IN B | 6 | Input | Inverting input, channel B |
| –IN C | 9 | Input | Inverting input, channel C |
| –IN D | 13 | Input | Inverting input, channel D |
| OUT A | 1 | Output | Output, channel A |
| OUT B | 7 | Output | Output, channel B |
| OUT C | 8 | Output | Output, channel C |
| OUT D | 14 | Output | Output, channel D |
| V+ | 4 | Power | Positive (highest) power supply |
| V– | 11 | Power | Negative (lowest) power supply |