ZHCSDA0E January 2015 – August 2018 MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721
There are up to nine 8-bit I/O ports implemented:
Configuration of Digital I/Os After BOR Reset
To prevent any cross-currents during start-up of the device, all port pins are high-impedance with Schmitt triggers and their module functions disabled. To enable the I/O functionality after a BOR reset, the ports must be configured first and then the LOCKLPM5 bit must be cleared. For details see the "Digital I/O" chapter, section "Configuration After Reset" in the MSP430FR58xx, MSP430FR59xx, and MSP430FR6xx Family User's Guide.