Changes from revision E to revision F
Changes from September 18, 2018 to September 10, 2020
Changes from revision D to revision E
Changes from December 9, 2015 to September 17, 2018
Changes from revision C to revision D
Changes from August 6, 2013 to December 8, 2015
The following table lists the changes to this data sheet from the original release through revision C.
|SLAS721C August 2013||
Section 1, Added note regarding pullup resistor to RST/NMI/SBWTDIO pin.
Added Applications, Development Tools Support, and Device and Development Tool Nomenclature
Section 1, Changed the description of the number of I/Os in each port.
Table 1-3, Added PM5CTL0 register.
Section 1, Fixed typo in IDD Test Conditions (changed from DAC12IOG to DAC12OG).
Section 1, Changed IERASE and IMERASE, IBANK limits.
|SLAS721B August 2012||
Changed description of ACLK in Section 1.
Added missing rows for DVSS and DNC (PW pins 29 and 30) in Section 1.
Changed typos to Interrupt Flag names on Timer TA2 rows in Table 1-1.
Changed SYSRSTIV, System Reset offset 1Ch to Reserved in Table 1-1.
Corrected names of SVMLVLRIFG and SVMHVLRIFG bits in Table 1-1.
Changed notes on Section 1.
Changed tSENSOR(sample) MIN to 100 µs in Section 1.
Changed note (2) in Section 1.
Editorial changes throughout.
|SLAS721A September 2011||Production Data release|
|SLAS721 August 2010||Product Preview release|
Changes from Revision () to Revision ()