The LPV521 has a rail-to-rail input that provides more flexibility for the system designer. Rail-to-rail input is achieved by using in parallel, one PMOS differential pair and one NMOS differential pair. When the common mode input voltage (V_CM) is near V⁺, the NMOS pair is on and the PMOS pair is off. When V_CM is near V⁻, the NMOS pair is off and the PMOS pair is on. When V_CM is between V⁺ and V⁻, internal logic decides how much current each differential pair get. This special logic maintains stable and low-distortion amplifier operation within the entire common-mode voltage range.

Both input stages have an offset voltage (V_OS) characteristic; therefore, the offset voltage of the LPV521 becomes a function of V_CM. V_OS has a crossover point at 1.0V less than V⁺. See the Input Offset Voltage vs Input Common Mode curves in the Typical Characteristics. Take care in situations where the input signal amplitude is comparable to the V_OS value or the design requires high accuracy. In these situations, the input signal must avoid the crossover point. In addition, parameters such as PSRR and CMRR that involve the input offset voltage are also affected by changes in V_CM across the differential-pair transition region.