ZHCSOP1A October   2021  – November 2022 LP87745-Q1

PRODUCTION DATA  

  1. 1特性
  2. 2应用
  3. 3说明
  4. 4Revision History
  5. 5说明（续）
  6. 6Pin Configuration and Functions
  7. 7Device and Documentation Support
    1. 7.1 Documentation Support
    2. 7.2 接收文档更新通知
    3. 7.3 支持资源
    4. 7.4 Trademarks
    5. 7.5 Electrostatic Discharge Caution
    6. 7.6 术语表
  8. 8Mechanical, Packaging, and Orderable Information
    1. 8.1 Packaging Option Addendum
    2. 8.2 Tape and Reel Information
    3.     17

封装选项

机械数据 (封装 | 引脚)
  • RXV|28
散热焊盘机械数据 (封装 | 引脚)

6 Pin Configuration and Functions

Figure 6-1 RXV Package, 28-Pin VQFN-HR (Top View)
Table 6-1 Pin Functions
PIN I/O TYPE DESCRIPTION CONNECTION IF NOT USED
NO. NAME
1 SCK_SPI I Digital Clock signal for SPI interface. Ground
2 SDO_SPI O Digital Output data signal for SPI interface. Floating
3 FB_B1 — Analog Output voltage feedback (positive) for BUCK1. Ground
4 CS_SPI/WD_DIS I Digital Primary function: Chip select signal for SPI interface. VCCA
I Digital Alternative programmable function: Watchdog Disable Input. Not applicable
5 AGND — Ground Ground. Ground
6 NRSTOUT O Digital Reset output. Floating
7 nINT O Digital Interrupt output and CAN PHY control or both. Floating
8 SDI_SPI I Digital Input data signal for SPI interface. Ground
9 VIO_LDO — Analog IO supply from the internal LDO or from external source. LDO enabled: regulator filter node. LDO disabled: input for connecting to an external IO supply source, with input filtering capacitor placed. Not applicable
10 VOUT_BST — Analog BOOST enabled: BOOST output (internally connected as VIO_LDO input). BOOST disabled and VIO_LDO disabled: short with VIO_LDO. BOOST disabled and VIO_LDO enabled: input for connecting to an external supply used as VIO_LDO input. External supply
11 SW_BST — Analog When BOOST enabled: BOOST input. When BOOST disabled: short with VOUT_BST. VOUT_BST
12 PGND_B3BST — Ground Power ground for BUCK3 and BOOST. Ground
13 PVIN_B3 — Power Power input for BUCK3. The separate power pins PVIN_Bxx are not connected together internally – PVIN_Bxx and VCCA pins must be connected together in the application and be locally bypassed. System supply
14 SW_B3 — Analog BUCK3 switch node. Floating
15 ENABLE I Digital Programmable ENABLE signal. Not applicable
16 nERR/GPO2 I Digital Primary function: System MCU Error Monitoring Input. Ground
O Digital Alternative programmable function: General Purpose Output signal (GPO2). Floating
O Digital Alternative programmable function: Fault Communication Output signal (FAULT2). Floating
17 FB_B3 — Analog Output voltage feedback (positive) for BUCK3. Ground
18 VOUT_VLDO — Power LDO regulator filter node. LDO is used for internal purposes. No external load allowed. -
19 AGND — Ground Ground. Ground
20 VCCA — Power Supply voltage for internal LDO. VCCA and PVIN_Bxx pins must be connected together in the application and be locally bypassed. System supply
21 FB_B2 — Analog Output voltage feedback (positive) for BUCK2. Ground
22 VMON1/GPO1 — Analog Voltage monitoring input. Ground
O Digital Alternative programmable function: General Purpose Output signal (GPO1). Floating
O Digital Alternative programmable function: Fault Communication Output signal (FAULT1). Floating
O Digital Alternative programmable function: CAN PHY control (CAN_DIS). Floating
23 SYNCCLKIN I Digital External clock input. Ground
24 SW_B2 — Analog BUCK2 switch node. Floating
25 PVIN_B2 — Power Power input for BUCK2. The separate power pins PVIN_Bxx are not connected together internally – PVIN_Bxx and VCCA pins must be connected together in the application and be locally bypassed. System supply
26 PGND_B12 — Ground Power ground for BUCK1 and BUCK2. Ground
27 PVIN_B1 — Power Power input for BUCK1. The separate power pins PVIN_Bxx are not connected together internally – PVIN_Bxx and VCCA pins must be connected together in the application and be locally bypassed. System supply
28 SW_B1 — Analog BUCK1 switch node. Floating