SNVS185F February   2002  – April 2017 LP3982

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 No-Load Stability
      2. 7.3.2 Fast Start-Up
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setting (ADJ Version Only)
        3. 8.2.2.3 Output Capacitance
        4. 8.2.2.4 Input Capacitor
        5. 8.2.2.5 Noise Bypass Capacitor
        6. 8.2.2.6 Fault Detection
        7. 8.2.2.7 Power Dissipation
        8. 8.2.2.8 Estimating Junction Temperature
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 WSON Mounting
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

5 Pin Configuration and Functions

DGK Package
8-Pin VSSOP
Top View
LP3982 20036901.gif
The SET pin is internally disconnected for the fixed versions.
NGM Package
8-Pin WSON With Thermal Pad
Top View
LP3982 20036933.gif
The SET pin is internally disconnected for the fixed versions.

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
CC 6 — Connect a capacitor between CC pin and ground to reduce the output noise. The optimum value for CC is 33 nF.
FAULT 8 Output FAULT pin goes low during out of regulation conditions like current limit and thermal shutdown, or when it approaches dropout. Requires a pullup resistor because it is an active-low, open-drain output.
GND 3 Ground Ground
IN 2 Input This is the input supply voltage to the regulator.
OUT 1, 4 Output Regulated output voltage
SET 5 Input In the adjustable version a resistor divider connected to this pin sets the output voltage. The SET pin is internally disconnected for the fixed versions.
SHDN 7 Input The SHDN pin allows the part to be turned to an ON or OFF state by pulling SHDN pin high or low.
DAP √ — WSON Only - The DAP (Die Attached Pad) is an exposed pad that does not have an internal connection; it functions as a thermal relief when soldered to a copper plane. It is recommend that the DAP be connected to GND. See WSON Mounting section for more information.