SNVS659I March   2011  – August 2015 LMZ23605

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Synchronization Input
      2. 7.3.2 Output Overvoltage Protection
      3. 7.3.3 Current Limit
      4. 7.3.4 Thermal Protection
      5. 7.3.5 Prebiased Start-Up
      6. 7.3.6 Tracking Supply Divider Option
    4. 7.4 Device Functional Modes
      1. 7.4.1 Discontinuous Conduction and Continuous Conduction Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Design Steps
        2. 8.2.2.2 Enable Divider, RENT, RENB and RENH Selection
        3. 8.2.2.3 Output Voltage Selection
        4. 8.2.2.4 Soft-Start Capacitor Selection
        5. 8.2.2.5 CO Selection
        6. 8.2.2.6 CIN Selection
        7. 8.2.2.7 Discontinuous Conduction and Continuous Conduction Mode Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Power Dissipation and Thermal Considerations
    4. 10.4 Power Module SMT Guidelines
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)(2)
MIN MAX UNIT
VIN to PGND –0.3 40 V
EN, SYNC to AGND –0.3 5.5 V
SS/TRK, FB to AGND –0.3 2.5 V
AGND to PGND –0.3 0.3 V
Junction temperature 150 °C
Peak reflow case temperature (30 sec) 245 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) For soldering specifications, refer to the following document: SNOA549

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIN 6 36 V
EN, SYNC 0 5 V
Operation junction temperature −40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) LMZ23605 UNIT
NDW
7 PINS
RθJA Junction-to-ambient thermal resistancet(2) 4-layer Evaluation Printed-Circuit-Board, 60 vias, No air flow 12 °C/W
2-layer JEDEC Printed-Circuit-Board, No air flow 21.5
RθJC(top) Junction-to-case (top) thermal resistance 1.9 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.
(2) RθJA measured on a 3.5-in × 3.5-in 4-layer board, with 3-oz. copper on outer layers and 2-oz. copper on inner layers, sixty thermal vias, no air flow, and 1-W power dissipation. Refer to application note layout diagrams.

6.5 Electrical Characteristics

Limits in standard type are for TJ = 25°C unless otherwise specified. Minimum and maximum limits are ensured through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated the following conditions apply: VIN = 12 V, VOUT = 3.3 V
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
SYSTEM PARAMETERS
ENABLE CONTROL
VEN EN threshold trip point VEN rising 1.279 V
over the junction temperature (TJ) range of –40°C to +125°C 1.1 1.458
VEN-HYS EN input hysteresis current VEN > 1.279 V –21 µA
SOFT-START
ISS SS source current VSS = 0 V 50 µA
over the junction temperature (TJ) range of –40°C to +125°C 40 60
tSS Internal soft-start interval 1.6 ms
CURRENT LIMIT
ICL Current limit threshold DC average over the junction temperature (TJ) range of –40°C to +125°C 5.4 A
INTERNAL SWITCHING OSCILLATOR
fosc Free-running oscillator frequency Sync input connected to ground. 711 812 914 kHz
fsync Synchronization range 650 950 kHz
VIL-sync Synchronization logic zero amplitude Relative to AGND over the junction temperature (TJ) range of –40°C to +125°C 0.4 V
VIH-sync Synchronization logic one amplitude Relative to AGND. over the junction temperature (TJ) range of –40°C to +125°C 1.5 V
Sync DC Synchronization duty cycle range 15% 50% 85%
Dmax Maximum Duty Factor 83%
REGULATION AND OVERVOLTAGE COMPARATOR
VFB In-regulation feedback voltage VSS >+ 0.8 V
IO = 5 A		 0.796 V
over the junction temperature (TJ) range of –40°C to +125°C 0.776 0.816
VFB-OV Feedback overvoltage protection threshold 0.86 V
IFB Feedback input bias current 5 nA
IQ Non-switching input current VFB= 0.86 V 2.6 mA
ISD Shutdown quiescent current VEN= 0 V 70 μA
THERMAL CHARACTERISTICS
TSD Thermal shutdown Rising 165 °C
TSD-HYST Thermal shutdown hysteresis Falling 15 °C
PERFORMANCE PARAMETERS(3)
ΔVO Output voltage ripple Cout = 220 uF with 7 mΩ ESR + 100 uF X7R + 2 x 0.047 uF BW at 20 MHz 9 mVPP
ΔVO/ΔVIN Line regulation VIN = 12 V to 36 V, IO= 0.001 A ±0.02%
ΔVO/ΔIOUT Load regulation VIN = 12 V, IO= 0.001 A to 5 A 1 mV/A
η Peak efficiency VIN = 12 V VO = 3.3 V, IO = 1 A 86%
VIN = 24 V VO = 3.3 V, IO = 2 A 80%
η Full load efficiency VIN = 12 V VO = 3.3 V, IO = 5 A 81.5%
VIN = 24 V VO = 3.3 V, IO = 5 A 76%
(1) Minimum and Maximum limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely parametric norm.
(3) Refer to BOM in Table 1.

6.6 Typical Characteristics

Unless otherwise specified, the following conditions apply: VIN = 12 V; CIN = 2 x 10 μF + 1-μF X7R Ceramic; CO = 220 μF Specialty Polymer + 10-µF Ceramic; TA = 25° C for waveforms. Efficiency and dissipation plots marked with * have cycle skipping at light loads resulting in slightly higher Output ripple.
LMZ23605 30116987.gif
Figure 1. Efficiency 6-V Output at 25°C Ambient
LMZ23605 30116952.gif
Figure 3. Efficiency 5-V Output at 25°C Ambient
LMZ23605 30116954.gif
Figure 5. Efficiency 3.3-V Output at 25°C Ambient
LMZ23605 30116956.gif
Figure 7. Efficiency 2.5-V Output at 25°C Ambient
LMZ23605 30116958.gif
Figure 9. Efficiency 1.8-V Output at 25°C Ambient
LMZ23605 30116960.gif
Figure 11. Efficiency 1.5-V Output at 25°C Ambient
LMZ23605 30116962.gif
Figure 13. Efficiency 1.2-V Output at 25°C Ambient
LMZ23605 30116964.gif
Figure 15. Efficiency 1-V Output at 25°C Ambient
LMZ23605 30116990.gif
Figure 17. Efficiency 0.8-V Output at 25°C Ambient
LMZ23605 30116926.gif
Figure 19. Efficiency 6-V Output at 85°C Ambient
LMZ23605 30116928.gif
Figure 21. Efficiency 5-V Output at 85°C Ambient
LMZ23605 30116930.gif
Figure 23. Efficiency 3.3-V Output at 85°C Ambient
LMZ23605 30116932.gif
Figure 25. Efficiency 2.5-V Output at 85°C Ambient
LMZ23605 30116934.gif
Figure 27. Efficiency 1.8-V Output at 85°C Ambient
LMZ23605 30116936.gif
Figure 29. Efficiency 1.5-V Output at 85°C Ambient
LMZ23605 30116938.gif
Figure 31. Efficiency 1.2-V Output at 85°C Ambient
LMZ23605 30116940.gif
Figure 33. Efficiency 1-V Output at 85°C Ambient
LMZ23605 30116992.gif
Figure 35. Efficiency 0.8-V Output at 85°C Ambient
LMZ23605 30116989.gif
VIN = 12 V, VOUT = 5 V
Figure 37. Thermal Derating
LMZ23605 30116996.gif
VIN = 24 V, VOUT = 5 V
Figure 39. Thermal Derating
LMZ23605 30116942.gif
VOUT = 3.3 V
Figure 41. Normalized Line and Load Regulation
LMZ23605 30116906.gif
12 VIN 3.3 VOat 5 A BW = 250 MHz
Figure 43. Output ripple
LMZ23605 30116918.gif
Figure 45. Short Circuit Current vs Input Voltage
LMZ23605 30116988.gif
Figure 2. Dissipation 6-V Output at 25°C Ambient
LMZ23605 30116953.gif
Figure 4. Dissipation 5-V Output at 25°C Ambient
LMZ23605 30116955.gif
Figure 6. Dissipation 3.3-V Output at 25°C Ambient
LMZ23605 30116957.gif
Figure 8. Dissipation 2.5-V Output at 25°C Ambient
LMZ23605 30116959.gif
Figure 10. Dissipation 1.8-V Output at 25°C Ambient
LMZ23605 30116961.gif
Figure 12. Dissipation 1.5-V Output at 25°C Ambient
LMZ23605 30116963.gif
Figure 14. Dissipation 1.2-V Output at 25°C Ambient
LMZ23605 30116965.gif
Figure 16. Dissipation 1-V Output at 25°C Ambient
LMZ23605 30116991.gif
Figure 18. Dissipation 0.8-V Output at 25°C Ambient
LMZ23605 30116927.gif
Figure 20. Dissipation 6-V Output at 85°C Ambient
LMZ23605 30116929.gif
Figure 22. Dissipation 5-V Output at 85°C Ambient
LMZ23605 30116931.gif
Figure 24. Dissipation 3.3-V Output at 85°C Ambient
LMZ23605 30116933.gif
Figure 26. Dissipation 2.5-V Output at 85°C Ambient
LMZ23605 30116935.gif
Figure 28. Dissipation 1.8-V Output at 85°C Ambient
LMZ23605 30116937.gif
Figure 30. Dissipation 1.5-V Output at 85°C Ambient
LMZ23605 30116939.gif
Figure 32. Dissipation 1.2-V Output at 85°C Ambient
LMZ23605 30116941.gif
Figure 34. Dissipation 1-V Output at 85°C Ambient
LMZ23605 30116993.gif
Figure 36. Dissipation 0.8-V Output at 85°C Ambient
LMZ23605 30116994.gif
VIN= 12 V, VOUT = 3.3 V
Figure 38. Thermal Derating
LMZ23605 30116997.gif
VIN = 24 V, VOUT = 3.3 V
Figure 40. Thermal Derating
LMZ23605 30116905.gif
12 VIN 3.3 VO at 5 A, BW = 20 MHz
Figure 42. Output Ripple
LMZ23605 30116908.gif
12 VIN 3.3 VO0.5 to 5-A Step
Figure 44. Transient response