SNOSB21D May 2008 – September 2016 LMH6518
PRODUCTION DATA.
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TERM | DEFINITION |
---|---|
AV_CM (dB) | Change in output offset voltage (ΔVOOS) with respect to the change in input common mode voltage (ΔVI_CM) |
AV_DIFF (dB) | Gain with 100-Ω differential load |
CM | Common mode |
CMRR (dB) | Common mode rejection defined as: AV_DIFF (dB) – AV_CM (dB) |
CMRR_CM | Common mode rejection relative to VCM defined as: ΔVOOS /ΔVCM |
HG | Preamp high gain |
Ladder | Ladder attenuator setting (0-20 dB) |
LG | Preamp low gain |
Max Gain | Gain = 38.8 dB |
Min Gain | Gain = −1.16 dB |
+OUT | Positive main output |
−OUT | Negative main output |
+OUT AUX | Positive auxiliary output |
−OUT AUX | Negative auxiliary output |
PB | Phase balance defined as the phase difference between the complimentary outputs relative to 180° |
PSRR | Input referred VOOS shift divided by change in VCC |
PSRR_CM | Output common mode voltage change (ΔVO_CM) with respect to VCC voltage change (ΔVCC) |
VCM | Input pin voltage that sets main output CM |
VCM_Aux | Input pin voltage that sets auxiliary output CM |
VI_CM | Input CM voltage (average of +IN and −IN) |
ΔVIN (V) | Differential voltage across device inputs |
VOOS | DC offset voltage. Differential output voltage measured with inputs shorted together to VCC/2 |
VO_CM | Output common mode voltage (DC average of V+OUT and V−OUT) |
VOS_CM | CM offset voltage: VO_CM – VCM |
ΔVO_CM | Variation in output common mode voltage (VO_CM) |
|
Balance error. Measure of the output swing balance of +OUT and −OUT, as reflected on the output common mode voltage (VO_CM), relative to the differential output swing (VOUT). Calculated as output common mode voltage change (ΔVO_CM) divided by the output differential voltage change (ΔVOUT, which is nominally around 700 mVPP) |
ΔVOUT | Change in differential output voltage (Corrected for DC offset, VOOS) |
For related documentation see the following:
Wideband Amplifiers by Peter Staric and Erik Margan, published by Springer (2006). (Section 5.2)
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.