SNOSB21D May   2008  – September 2016 LMH6518

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Preamplifier
        1. 7.3.1.1 Primary Output Amplifier
        2. 7.3.1.2 Auxiliary Amplifier
      2. 7.3.2 Overvoltage Clamp
      3. 7.3.3 Attenuator
      4. 7.3.4 Digital Control Block
    4. 7.4 Device Functional Modes
      1. 7.4.1 Primary Amplifier
      2. 7.4.2 Auxiliary Output
    5. 7.5 Programming
      1. 7.5.1 Logic Functions
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Oscilloscope Front End
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Settings and ADC SPI Code (ECM)
          2. 8.2.1.2.2 Input and Output Considerations
            1. 8.2.1.2.2.1 Output Swing, Clamping, and Operation Beyond Full Scale
          3. 8.2.1.2.3 Oscilloscope Trigger Applications
        3. 8.2.1.3 Application Curves
      2. 8.2.2 JFET LNA Implementation
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Attenuator Design
        3. 8.2.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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7 Detailed Description

7.1 Overview

The LMH6518 device is a digitally-controlled variable gain amplifier (DVGA) which is designed specifically as an oscilloscope analog front end (AFE). This device samples an analog voltage and conditions it for the analog to digital converter (ADC) input. It is specifically designed to drive TI's giga sample ADCs which have 100-Ω input impedance and 800-mVPP full scale input voltage.

7.2 Functional Block Diagram

LMH6518 30068801.gif

7.3 Feature Description

The LMH6518 offers several unique features in addition to being a general purpose digital variable gain amplifier (DVGA).

7.3.1 Input Preamplifier

The LMH6518 has a fully differential preamplifier which has a consistent 150-kΩ impedance across all gain settings. The LMH6518 is also driven with a single-ended signal source. The preamplifier has two gain settings. See Input and Output Considerations for details.

7.3.1.1 Primary Output Amplifier

The LMH6518 has two nearly identical amplifiers. The output amplifier was designed as the primary output amplifier. It features an internal 100-Ω termination for interfacing with 100-Ω input impedance ADCs. The output amplifier has a common mode voltage control pin which sets the output common mode of the amplifier.

7.3.1.2 Auxiliary Amplifier

The LMH6518 has a second output amplifier that was designed to provide a trigger signal when used as an oscilloscope AFE. The auxiliary amplifier has all of the features of the output amplifier and provides a duplicate signal for use in trigger circuits. The auxiliary amplifier has a common mode voltage control pin which sets the output common mode of the amplifier.

7.3.2 Overvoltage Clamp

THe LMH6518 features two levels of clamps used to protect the amplifier and the ADC from voltage transients. These clamps are placed after the input preamplifier and also after the final output amplifier. The clamp voltages are set using the SPI bus.

7.3.3 Attenuator

The primary gain control feature of the LMH65418 is the digital attenuator. The attenuator controls the overall gain of the amplifier. The attenuator has a range of 0 dB to 20 dB of attenuation.

7.3.4 Digital Control Block

The LMH6518 has digitally controlled gain as well as digitally controlled voltage clamps and digitally controlled bandwidth. If it is not used, this block can also disable the auxiliary amplifier. Logic Functions has details on the digital control registers and programming.

7.4 Device Functional Modes

7.4.1 Primary Amplifier

The main functional mode of the LMH6518 is as an AFE providing gain, voltage clamping, and frequency limiting. In this mode, the gain, bandwidth, and voltage swing are all programmable using the SPI control block.

7.4.2 Auxiliary Output

The secondary functional mode of the LMH6518 is the auxiliary output. This output is nearly identical to the primary amplifier. The only difference is that the auxiliary output has slightly lower distortion performance. The auxiliary output was designed to provide a trigger signal when used as an oscilloscope AFE.

7.5 Programming

7.5.1 Logic Functions

The following LMH6518 functions are controlled using the SPI-1 compatible bus:

  • Filters (20, 100, 200, 350, 650, 750 MHz or full bandwidth)
  • Power mode (Full power or auxiliary high impedance, Hi-Z)
  • Preamp (HG or LG)
  • Attenuation ladder (0 dB to 20 dB, 10 states)
  • LMH6518 state write or read back

The SPI-1 bus uses 3.3-V logic. SDIO is the serial digital input-output which writes to the LMH6518 or reads back from it. SCLK is the bus clock with chip select function controlled by CS.

LMH6518 30068884.gif Figure 54. Serial Interface Protocol, Read Operation
LMH6518 30068885.gif Figure 55. Serial Interface Protocol, Write Operation
LMH6518 30068886.gif Figure 56. Read Timing
LMH6518 30068887.gif Figure 57. Write Timing

Table 1. Data Field

FILTER PREAMP LADDER ATTENUATION
D15
(MSB)		 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
(LSB)
X 0 0 0 0 0 = Full power
1 = Aux Hi-Z		 0 See Table 3 0 0 = LG
1 = HG		 See Table 4

SPACER

NOTE

Bits D5, D9, and D11 to D14 must be 0. Otherwise, device operation is undefined and specifications are not ensured.

Table 2. Default Power-On Reset Condition

FILTER PREAMP LADDER ATTENUATION
D15
(MSB)		 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
(LSB)
0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0

Table 3. Filter Selection Data Field

FILTER BANDWIDTH (MHz)
D8 D7 D6
0 0 0 Full
0 0 1 20
0 1 0 100
0 1 1 200
1 0 0 350
1 0 1 650
1 1 0 750
1 1 1 Unallowed

SPACER

NOTE

All filters are low-pass, single pole roll-off and operate on both main and auxiliary outputs. These filters are intended as signal path bandwidth and noise limiting.

Table 4. Ladder Attenuation Data Field

LADDER ATTENUATION BANDWIDTH (dB)
D3 D2 D1 D0
0 0 0 0 0
0 0 0 1 −2
0 0 1 0 −4
0 0 1 1 −6
0 1 0 0 −8
0 1 0 1 −10
0 1 1 0 −12
0 1 1 1 −14
1 0 0 0 −16
1 0 0 1 −18
1 0 1 0 −20
1 0 1 1 Unallowed
1 1 0 0 Unallowed
1 1 0 1 Unallowed
1 1 1 0 Unallowed
1 1 1 1 Unallowed

SPACER

NOTE

An unallowed SPI-1 state may result in undefined operation where device behavior is not ensured.