ZHCSF77A July   2016  – July 2016 LMH2832

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: SPI
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Setup Diagrams
    2. 8.2 ATE Testing and DC Measurements
    3. 8.3 Frequency Response
    4. 8.4 Distortion
    5. 8.5 Noise Figure
    6. 8.6 Pulse Response, Slew Rate, and Overdrive Recovery
    7. 8.7 Power-Down
    8. 8.8 Crosstalk, Gain Matching, and Phase Matching
    9. 8.9 Output Measurement Reference Points
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Analog Input Characteristics
      2. 9.3.2 Analog Output Characteristics
      3. 9.3.3 Driving Low Insertion-Loss Filters
      4. 9.3.4 Input Impedance Matching
      5. 9.3.5 Power-On Reset (POR)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power-Down (PD)
      2. 9.4.2 Gain Control
    5. 9.5 Programming
      1. 9.5.1 Details of the Serial Interface
      2. 9.5.2 Timing Diagrams
    6. 9.6 Register Maps
      1. 9.6.1 Register Descriptions
        1. 9.6.1.1 SW Reset Register (address = 2)
      2. 9.6.2 Power-Down Control Register (address = 3)
      3. 9.6.3 Channel A RW0 Register (address = 4)
      4. 9.6.4 Channel A RW1 Register (address = 5)
      5. 9.6.5 Channel B RW0 Register (address = 6)
      6. 9.6.6 Channel B RW1 Register (address = 7)
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Driving ADCs
        1. 10.1.1.1 SNR Considerations
        2. 10.1.1.2 SFDR Considerations
        3. 10.1.1.3 ADC Input Common-Mode Voltage Considerations (AC-Coupled Input)
        4. 10.1.1.4 ADC Input Common-Mode Voltage Considerations (DC-Coupled Input)
    2. 10.2 Typical Applications
      1. 10.2.1 DOCSIS 3.X Driver
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Source Resistance Matching
          2. 10.2.1.2.2 Output Impedance Matching
          3. 10.2.1.2.3 Voltage Headroom Considerations
        3. 10.2.1.3 Application Curve
      2. 10.2.2 IQ Receiver
    3. 10.3 Do's and Don'ts
      1. 10.3.1 Do:
      2. 10.3.2 Don't:
  11. 11Power Supply Recommendations
    1. 11.1 Split Supplies
    2. 11.2 Supply Decoupling
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 器件支持
      1. 13.1.1 器件命名规则
    2. 13.2 文档支持
      1. 13.2.1 相关文档　
    3. 13.3 接收文档更新通知
    4. 13.4 社区资源
    5. 13.5 商标
    6. 13.6 静电放电警告
    7. 13.7 Glossary
  14. 14机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6 Pin Configuration and Functions

RHA Package
40-Pin VQFN
Top View

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
CS 4 I Serial interface enable, active low
GND 2, 9, 12, 19, 22, 29, 32, 39 I Analog ground
INMA 1 I Negative differential input, channel A
INMB 10 I Negative differential input, channel B
INPA 40 I Positive differential input, channel A
INPB 11 I Positive differential input, channel B
OUTMA 30 O Negative differential output, channel A
OUTMB 21 O Negative differential output, channel B
OUTPA 31 O Positive differential output, channel A
OUTPB 20 O Positive differential output, channel B
PDB 15 I Power-down control, channel B (logic high = power-down)
PDA 36 I Power-down control, channel A (logic high = power-down)
SCLK 5 I Serial interface clock input
SDI 6 I Serial interface data input
SDO 7 O Serial interface data output
VCC 3, 8, 13, 14, 16, 17, 18, 23, 24, 25, 26, 27, 28, 33, 34, 35, 37, 38 I Analog voltage supply
Thermal pad — Connected to ground